Virtuoso Schematic Netlist flattening...

Hello,

Can anybody say if we can do a flattening of the schematic netlist to
an arbitratry level?

....Because the netlist flattening tool in cadence design tools flattens
the netlist to lowest level that is till the library defined elements
such as the pmos and nmos...but what we want is to flatten till a user
defined symbol.

-vs_p.

 

I'm using the PRFlatten to do the flattening...any help?

 

Use the switch/stop view lists to control netlisting.
That is, create a stopping view for the cells you want to stop at.
prFlatten wants abstract view to stop at (it will need a prCellType property,
i think). There is a hierarchy browser with prFlatten to generate auto-abstracts
for the cells that do not have one - not very user-friendly, though.
Best is to use the abstract generator.

stéphane

 

Hi,

Thanks for responding.

yes.. as you mentioned the hierarchical browser is not much useful...

Got queries on your suggestion...What should be the view contents of
the abstract view..only pins?....if we define only pins does PRFlatten
stop there...?...will I be able to connect the top level view with
these abstract view as we do with symbols...

.....actually I'm not a schematic designer(but I'm familiar with basics
of schematics and I need this for part of a project)

-vs_p.

 

Mostly, they contain pins, blockages, plus some properties on the cell and on the
pins. The properties are not absolutely needed by PRFlatten, but it will complain
if it cannot find them.

It generates a flat netlist using the switch/stop view lists. For this, the usual
requirement for succeeding is that cells must have the same pins. Otherwise netlisting
won't succeed. so you have to define pins, and the view must be in the stop view list.

Aaaargh... are you trying to generate a flat schematic? PRFlatten is for generating layouts,
it won't generate a schematic.
If you want to generate a schematic, you might want to look at
http://groups.google.ch/group/comp....7a860?q=flatten&rnum=2&hl=fr#f622f01c0457a860

stéphane

 

Hi,

Thanks very much particularly for the last point as I was trying to do
exactly that. I shall follow the link and try to get the best out of
it.

-vs_p.

 

I guess you could always flatten it with PRflatten and then do
File->Import->Netlist View to build a schematic from the result?

If you really wanted to, that is. As Stephane pointed out, this may not be the
most efficient approach.

Andrew.

 

Hi,

My original requirement is a CDL Out of the flattened schematic
netlist. Will I be able to do that with above approach?

-vs_p.

 

Probably, if you map to the right library.

Also, there is support for flat netlisting in CDL. This is covered in the
documentation, if I remember rightly - that's probably a simpler solution.
That way you don't need to flatten the design.

Put :

cdlNetlistType='fnl

in your .simrc file.

Regards,

Andrew.