transmission line as verilog-a or spectre-HDL

Discussion in 'Cadence' started by Svenn Are Bjerkem, May 9, 2005.

  1. Hi,

    I have been using the lmg application and transmission line to model a
    channel. I was wondering if it is possible to convert the transmission line
    equations into verilog-a or ahdl since I then could do some parametric
    simulations without recalculation in lmg.

    I have been looking at the telegraph equations for some time now, but
    neither google nor my math skills have been able to find an equation that I
    can convert to hdl.

    Maybe I am missing something about transmission lines....
     
    Svenn Are Bjerkem, May 9, 2005
    #1
  2. Hi again,

    I forgot to tell that I want to vary the length of the transmission line. I
    do not know any RLC or G values of the channel so I would need to calculate
    them once with lmg and then only have the hdl block extend this for a
    length parameter.
     
    Svenn Are Bjerkem, May 9, 2005
    #2
  3. Hi Svenn,

    In that case what you want to do is to use lmg to write out a file of
    frequency dependent RLGC matrices, rather than a subcircuit model. This should
    be more accurate anyway. The advantage of this approach is that the RGLC
    matrices are per unit length.

    You then use the mtline component (from analogLib) which corresponds to
    spectre's mtline component (spectre -h mtline). On this component you can
    specify a length, and then this may be swept (provide you're using IC5032
    or later - there was a bug in an earlier IC50 subversion).

    The one issue with mtline is that if you want to use it with RF analyses,
    you need to be using IC5141 or MMSIM60. And even then, it currently is only
    supported for driven PSS analysis. Autonomous support is coming soon, if I
    remember rightly. Otherwise, you have to use the subcircuit model approach
    from lmg, which produces a model with fixed length, and you can't sweep it.

    BTW, in lmg, use Options->Output File control, and set it to RLGC. For
    complex multi-line situations (especially if the lines are long), not writing
    out the subcircuit model can save a _lot_ of time!

    Regards,

    Andrew.
     
    Andrew Beckett, May 9, 2005
    #3
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