Dear group, We are setting up a new designkit and we are experiencing a strange problem when simulting. Inside a Verilog-A File I see following lines, which create a syntax error and I dont know why because I do not understand verilog-A Spectre just reports a syntax error during AHDL Readin. Whats going wrong ? `MPRcc( TR , 21.0 , "degC" , -250.0 , 1000.0 , "nominal (reference) temperature") `MPRoo( LMIN , 1.0e-08 , "m" , 0.0 , inf , "minimum allowed drawn length") `MPRoo( LMAX , 9.9e+09 , "m" , 0.0 , inf , "maximum allowed drawn length")