runnig vhdl-ams

Hai ,

I am new to this group and to Cadence,

My question is: is there a way to run vhdl-ams code in Cadence?

I have run vhdl and tried verilog-ams on Cadence.

For now i am using a student version of System Vision provided by
Mentor Graphics, but since my University has a licensed version of
Cadence, i was just wondering if i can port my codes to Cadence.

I will be happy if somebody could suggest me a way if one exists.

Thanks
Manivannan

 

The tool is AMS Designer.

There are a number of previous threads on this - you might want to check
on google to get more information, or you could (if all else fails) read the
manual.

Andrew.

 

I am getting the following error when I try to netlist using VHDL tool
box,

vhdlNet: *E,349: Unable to netlist VHDL file
/user/test/cds446/bhas/TOP_CELL/entity/vhdl.vhd because it failed VHDL
compilation.
Please clean up the syntax errors before trying again.
vhdlNet: *E,346: Entity creation from pinList file 'TOP_CELL' is aborted
due to previous errors.

The error is coming to even for a simple block. Do I miss any setups?

 

Is this for VHDL-AMS? (since you replied to that thread). VHDL-AMS views cannot
be used in VHDL toolbox - that's just for pure VHDL (no AMS).

Andrew.

 

sorry for the post in wrong thread.

Its just pure VHDL flow. customer support, had provided solution for the
issue. I was missing CDS_VHDL environment.

Thanks!!