Report Sensitized Path

Discussion in 'Cadence' started by trisha.woods, Nov 3, 2005.

  1. trisha.woods

    trisha.woods Guest

    Hi,
    Is there any tool (preferably within cadence) that can report the
    nets, cells and pins involved in path undergoing a logic transistion.
    For example, I have a gate netlist and a input vector sequence ( e.g.
    1110->1111 i.e. transition on LSB ) and I want to know all the gates,
    nets and pins through which the logic transition propagates from input
    (LSB) to the output (or outputs).

    Regards
    Trisha.
     
    trisha.woods, Nov 3, 2005
    #1
  2. trisha.woods

    Heidi Guest

    You can try GOF, Gates-On-the-Fly. A graphical tool to handle netlist.
    The powerful partial schematic feature is very useful in debug netlist
    and report the related nets, cells and pins in your case.
    Find one cell that LSB connecting to, bring up GofTrace(netlist trace
    and debug tool) with the cell, click on the output pin of the cell, the
    fanout cells will appear on GUI window. And keep on clicking and
    tracing, a circuit will be created.

    Goto www.nandigits.com and download for free trial.
    Let me know if you have any problem.

    Heidi
     
    Heidi, Nov 6, 2005
    #2
Ask a Question

Want to reply to this thread or ask your own question?

You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.
Similar Threads

  1. What's the report function going to be for?

  2. Whats the process for figuring found path of xref when xref has no path?

  3. synthesis report

  4. Path or stitched path selection

  5. Sweep with path vs Extrude with path

  6. UNC path and absolute path

  7. Changing an xref path - the whole path??

Loading...