pvs (calibre deck) lvs, INCLUDE source.added

Discussion in 'Cadence' started by stuart.duncan, Mar 26, 2009.

  1. Hi there,

    I am looking for a way to make pvs ( lvs verification running from
    within virtuoso) somehow insert this line into my nestlist:

    ..INCLUDE source.added

    So far the only way i can do it is manually export my CDL with
    "include file: source.added" then run pvs on schematic vs netlist.
    This is a bit clunky, i'd prefer that i can run pvs on layout vs
    schematic but i don't see any option to include the source.added
    (though i have tried a few ways so perhaps my syntax is just wrong).

    Not strictly a cadence Question but can the .INCLUDE source.added be
    written directly into the deck in a different syntax (i tried it as
    above but it did not work)?

    Thanks

    Stu
     
    stuart.duncan, Mar 26, 2009
    #1
  2. stuart.duncan

    Riad KACED Guest

    Riad KACED, Mar 28, 2009
    #2
  3. stuart.duncan

    Riad KACED Guest

    Hi Stu,

    You can make this using the cdlOutKeys skill variable by filling the
    'incFile propeorty.
    Something like:

    cdlOutKeys = list(nil
    'runInBackground nil
    'cdsNetlistingMode "Analog"
    'simLibName ""
    'simCellName ""
    'simViewName "schematic"
    'hnlNetlistFileName "netlist"
    'simRunDir "."
    'shortRES 2000.000000
    'resistorModel ""
    'setEQUIV ""
    'incFILE "THE_LOCATION_OF_MY_FILE/source.added
    "
    'globalPowerSig ""
    'globalGndSig ""
    'resistorCheck "value"
    'capacitorCheck "value"
    'pinMAP nil
    'shrinkFACTOR 0.000000
    'diodeCheck '"both"
    'checkScale "meter"
    'displayPININFO t
    'checkLDD nil
    )

    You might be interested in the comments I put together at a previous
    similar thread:
    http://groups.google.com/group/comp...read/thread/5fc472ad34dd272d/d56b7396c43e1d02

    Cheers,
    Riad.
     
    Riad KACED, Mar 30, 2009
    #3
  4. Hi Riad, have you tried this out with PVS lvs?

    So it looks to me like cdlOutKeys is effectively the form for CDL out.
    That would mean that PVS then automatically refers to cdlOutKeys when
    it generates the netlist from the dfII schematic.

    I tried this & it does not work for me (so far).

    Thanks

    Stu
     
    stuart.duncan, Mar 31, 2009
    #4
  5. stuart.duncan

    Riad KACED Guest

    Hi Stu,

    I haven't tried PVS I'm afraid.
    the cdlOutKeys variable is the standard way to deal with CDL outs.
    have your tried a Calibre runset otherwise ?

    I'll give it a look with PVS at some point.

    Riad.
     
    Riad KACED, Apr 1, 2009
    #5
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