Problems with OSU Standard Cell Libraries and importing encountergenerated .v netlist

Discussion in 'Cadence' started by Devendra Rai, Aug 26, 2008.

  1. Devendra Rai

    Devendra Rai Guest

    All,

    I wrote a description of a circuit in VHDL and then converted it to a
    verilog netlist using encounter. Generated a gds2 file as well. I am
    using OSU Standard Cells.

    The problems starts when I try to import the netlist (ICFB -> Import -
    module is built using simpler sub-modules, which are in turn built out
    of basic gates. When I 'import' the netlist, I see that I get
    'schematic' and 'symbol' views of all the submodules (and I can
    simulate them, I can go down the hirearchy and see trasistor level
    design). But, my top module does not have 'schematic' view. I get
    messages which are: "Verilog definition for module AOI21X1 was not
    found. Using lib 'OSU_Standard Cells_AMI05' cell 'AOI21X1' view
    'symbol' as its symbol".

    It is strange, since the submodules also use the same basic gates
    (like AOl21X1) these have been imported correctly.

    Can anyone give me an idea on what's going on? I am using ICFB
    5.10.41.169, or Cadence 2005.

    Thanks!

    Devendra Rai
     
    Devendra Rai, Aug 26, 2008
    #1
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