Problems in Virtuoso Layout XL

Hello,

I am using Cadence Virtuoso Layout XL. I am facing few problems in the
software, can anyone please help me in this matter.

The following are the problems I am facing while using Cadence Virtuoso
Layout XL:

1. Edit --> Component types: Don't have any "Ref lib"?? Can
"Ref Lib" be same as the "Tech Lib"?? How to create
components?? Like "PMOS and NMOS types" in the component types using
Component Class PMOS and NMOS??

2. Place --> Partitioning: How to do partitioning, like partitioning
the layout into P-part and N-part?? I tried of doing that, but things
are not saved and they are not accessed in the next phase, i.e.
Placement Planning.

3. Place --> Placement Planning: The partitions made in the previous
section, i.e. Partitioning, don't reflect here, apart from Boundary.
Moreover, even if a rectangle is drawn, "calculate estimates"
doesn't work. It should show the number of rows, number of PMOS and
number of NMOS.

4. Can we write Class files (design class files for nets, so that same
rules can be applied to all in the class), in the virtuoso layout XL
itself?? Well I have an idea they can be defined in Chip Assembly
Router.

Hoping for an positive reply,

Thank you,

With regards,

ec