problem fixing hold violations in cadence encounter.

Discussion in 'Cadence' started by Nagaraj.Ananth, Jul 11, 2006.

  1. Hi,

    I am trying to place and route a synthesised netlist in cadence
    encounter.I did a timing analysis on my trial routed block before CTS
    was done.I had 2 minor hold violations when i did the timing analysis
    with an ideal clock.Then after clock tree synthesis and nano route was
    over I did a timing analysis.There were more than 50 violated paths
    with 2 paths having huge clock gating hold violations.So I tried doing
    a
    hold time slack optimisation by giving a slack of 0.2 ns in the post
    route mode.Before starting the optimistation I guess the tool itself
    does a hold time slack analysis and it shows me that there are only 2
    paths violated with very little negative slack(as against the 50
    violated paths during timing analysis).The report generated after
    optimisation says that there are 0 violating paths and the worst case
    slack is 0.174ns.But when i do a timing analysis on the generated
    layout after fresh RC extraction and delay calculation there are
    still more than 50 violated paths.Can anyone please tell me why this
    discrepancy is happening? Which report am i to trust?

    thanks,
    Nagaraj
     
    Nagaraj.Ananth, Jul 11, 2006
    #1
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