pfet question

Discussion in 'Cadence' started by Kuan Zhou, Mar 3, 2004.

  1. Kuan Zhou

    Kuan Zhou Guest

    Hi,
    When I looked at the layouts of CMOS, I often found
    pfets are surrounded by deep trenches. Is it required or not?
    If I only use pfets for low frequency application, can I
    ignore the deep trenches?
    If I have high frequency signals around CMOS, I think it's
    better to use a deep trench wall to enclose all the pfets and nfets.
    Thus they will not be affected by the high frequency signals, am I right?


    sincerely
     
    Kuan Zhou, Mar 3, 2004
    #1
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