OA PCell cache

Hi All,

While browsing around, I found that there are a number of "solutions"
to generate and access PCell submaster caches, and still wonder if they
are equivalent/interoperable/redundant. I found a
- Ciranova Si2 contribution from 2007, a document from 2006.
- a commercial product 'PCell Xtreme'
- a PCellFile class in the latest (so-called DataModel 4) OA, but that
seems incomplete.
- a cadence document about the "cdsSkillIPcell" plugin, which seems to
automatically populate the cache and work also in DM3

So far it is rather murky to me how to use existing plugins, or if I
should write yet another from scratch... Any insight welcome, so I may
keep on rocking in this free world.

 

Hi Fred,

I'd say that some of them are also competitive. There are different
EDA vendors behind, some are for free, other licensed but I'm not
learning you anything I suppose ...
Well, some solutions are good if you start things from scratch. In
reality, for industrial mass-production, we do a lot of re-use and
tweak and very rarely starting things out of nothing. This constraint
is unfortunately limiting our choices. In other words, one has to go
with the solution that does not break the design flow or require a
massive effort to migrate ...

Cheers,
Riad.

 

Riad KACED wrote, on 03/12/09 22:54:

There is also (in IC612 onwards, so IC613 if talking about currently supported
releases) a capability built into Virtuoso called "Express Pcells" which does
this. Search in cdnshelp to find out more about this.

IC612/IC613 are DM4-based.

The two main solutions are really the Ciranova (Pcell Xtreme, I think) solution
and the Cadence Express Pcells solution (in no particular order, but if you have
Virtuoso already, it uses your existing licenses, potentially). Worth speaking
to your local Cadence support about to get more info than I can give in a quick
posting here...

Regards,

Andrew.

 

Andrew,

It was indeed just a matter of RTFM for the Cadence Express Pcells, I
just got confused because in the indian user-group doc the plugin was
called cdsSkillIPcell, whereas Express is just part of the same
cdsSkillPcell plugin for IC61{2,3}. I was a bit disappointed to see that
the store is all out-of-band concerning OA : the incomplete standard for
IPcell in OA does at least specify that the caches are registered as
managed files. Is there a way (a bit like with verilogA compilation) to
switch to a storage alongside the views ?

Alas, I can not do any experimenting with Express Pcells: generating
the cache requires an XL token and I have only L here. This is probably
a standard deal to have only Virtuoso L and no XL or above in the
Connections Program, and no AE either. Did I understand the docs right
in that the XL token is also necessary for read-only access from 3rd
party ?

Is there something you know about Xtreme ( or something you allegedly
thought you may have heard but cannot confirm ? Do they have an
auto-cache generation that applies to any (skill/tickle/python/c++)
pcell in IC ?

Cheers.

 

fogh wrote, on 03/21/09 14:09:

Frederic,

I don't believe so. The cache is always a separate directory. In fact it's
slightly debatable as to whether they should be managed - potentially different
users might have different views of the world.

That's correct. Not sure what you mean about "no AE either"?

I don't know - I've not seen Xtreme. You'd have to ask Ciranova about that.

Regards,

Andrew.

 

Frederic,

I'm with Ciranova. Some clarification:

The Ciranova 2007 contribution to Si2 is technology and source code
for OpenAccess tool vendors. It is not an end-user solution.

As you discovered, Ciranova also offers a commercial product called
PCell Xtreme that enables OpenAccess layout editors to cache PCells.
It delivers two benefits: A database with cached PCells opens many
times faster, and proprietary PCells can be opened and parameterized
by OpenAccess tools from many vendors.

Please contact me at Ciranova if you would like more information. You
may reach me at .

Dave Millman