Hello everyone there: I got the following error when using ncelab for the verilog file which contains timing information like this: $setup(negedge D, posedge CLK, tsetup_negedge $D$CLK, NOTIFIER); $hold(negedge D, posedge CLK, tsetup_negedge $D$CLK, NOTIFIER); but I got a bunch of warning like this: negative timing check limit not allowed in a 1 limit timing check Not sure what they mean and how to deal with them. Any input is appreciated! -Jerry