Montecarlo: correlation parameter value for matched pairs?

Discussion in 'Cadence' started by spectrallypure, Sep 2, 2008.

  1. Hello again. What is the criteria for choosing the value of the
    correlation parameter value for matched transistors, when performing
    Monte Carlo simulations in ADE?

    For example, in the widely-known article "Recommended Spectre Monte
    Carlo Modeling Methodology" (www.designers-guide.org/Modeling/
    montecarlo.pdf), they use cc=0.75 for correlating two matched
    resistors. What about the values for, lets say, matched transistors in
    a differential pair or in a mirror? Does the correlation parameter
    should be chosen depending if the transistors are multi-fingered and
    interleaved? What about the cases of more than 2 transistors (for
    instance, a current mirror with several copies)?

    I suspect it might have something to do with the particular process
    taken into account. I am using the AMS C35B4 cmos technology, but
    unfortunately I haven't been able to find any suggestions for the
    values of the correlation parameter that should be used...

    Thanks a lot for any ideas!

    Cheers,

    Jorge.
     
    spectrallypure, Sep 2, 2008
    #1
  2. spectrallypure

    Riad KACED Guest

    Hi Jorge,

    This is rather a tricky question :-(
    It think this is more related to the experience with the process
    itself. It's really something you should discuss with the process
    engineers from your foundry. It might be helpful to ask for the test
    structures that have been used to extract the MC matching data and
    then compare them to your structure/Application ... etc. I don't think
    there is a proven solid science behind this. It's rather something
    related to the feeling and the appreciation of the IC designers based
    on their experience on both the process and the application. I'm not
    able to propose any number for this I'm afraid. The default (i.e no
    correlation) is of course the most pessimistic scenario ...

    That was my attempt anyway !
    let's see what other chaps think about it ...

    Cheers,
    Riad.
     
    Riad KACED, Sep 3, 2008
    #2
  3. Thanks for your reply, Riad! ...I suspected it was a tricky
    question :)

    About contacting the foundry for this information, unfortunately I
    work in a university, and we have no support from them about this kind
    of issues.

    Still, It would be really useful to know what others designers in the
    forum use in their practical work; I really doubt that everybody is
    oversizing their designs by considering no correlation at all between
    groups of matched transistors!

    Thanks again & regards,

    Jorge.
     
    spectrallypure, Sep 3, 2008
    #3
  4. The more I ask about the infamous correlation parameter, the more
    astonished I get... Today I asked an associate professor, which I know
    has some experience in analog design (i.e. has done some working
    silicon), and he was totally surprised to learn about it... he had no
    idea of its existence!!!

    I have also searched in the documentation of two other design kits
    besides AMS (namely, TSMC & UMC), and found no references whatsoever
    about how to take into account matched groups of transistors. I think
    these are rather well-known and widely-used processes, why does it
    seem nobody cared about documenting the proper way of performing
    montecarlo simulations, taking into account matched pairs?

    ....I guess virtually everybody working in analog MUST do montecarlo
    simulations before going to fabrication, and MUST take into account
    matching on those simulations... How do they (properly) do it? :O

    Puzzled (and also desperate, but that's normal :) ),

    Jorge.
     
    spectrallypure, Sep 9, 2008
    #4
  5. spectrallypure

    S. Badel Guest

    Jorge,

    The problem is not that complicated. Say you have two devices with a parameter which is varying
    randomly with a variance of s. Then the difference between the two devices will be of
    v(x-y)=2*v-2*cov(x,y)=2*v*(1-cc)
    where cc is correlation coefficient. so if there's no correlation, the variance of the difference
    (mismatch) is sqrt(2) time larger than the variance of the individuals (m=sqrt(2)*v). With a
    non-zero correlation coeff., the variance of the difference is sqrt(2)*sqrt(1-cc).

    Therefore, by choosing an appropriate correlation coefficient, you can obtain the desired mismatch
    distribution. Say you want a resulting mismatch variance of w, you get cc = 1 - 0.5*w/v = 1 -
    sqrt(0.5)*v/m

    As an example, say you have a differential pair and want to correlate the two devices. First run a
    simulation with two uncorrelated devices and from the results extract the variance of the
    parameter(s) you're interested into (drain current, threshold voltage, transconductance, whatever).
    Then, assuming you know what variance you *expect* for these parameters, calculate the correlation
    coeffs accordingly.

    The real problem here is to accurately characterize the mismatch for a given process, that is, to
    know what to expect. If you know that, then your problem's solved. Unfortunately accurate and
    thorough mismatch data is not often available - it takes a lot of effort and time to characterize a
    process for mismatch - and you have no choice but to try and estimate it. Mostly for mature
    processes specifically dedicated to analog/rf applications you will find good matching data, I guess.

    Considering all these problems and the efforts it takes to predict correlation coeffs for all the
    matched devices in a circuit, and considering that this effort might quite well be useless unless
    you have a high confidence in your process and its data, it might be an option to oversize a bit
    your design. It will give you confidence and save you time and headache...

    Just my two cents ;)
    Cheers,
    Stéphane
     
    S. Badel, Sep 10, 2008
    #5
  6. Thanks so much for your reply, Stéphane: so helpful, as usual :)
    BTW... where did you learned those formulas? In some course at EPFL?
    I've searched the whole web for any references on the topic and found
    nothing so explanatory whatsoever! Thanks again!

    Regards,

    Jorge.
     
    spectrallypure, Sep 10, 2008
    #6
  7. spectrallypure

    S. Badel Guest

    Jorge, thanks.
    It's just basic statistics/probability... Any book will do. Even google will spit out that kind of
    information if you look for "correlation coefficient", "correlation" and that kind of keywords. Just
    need to know what to look for :)

    Stéphane.
     
    S. Badel, Sep 11, 2008
    #7
  8. spectrallypure

    Riad KACED Guest

    Hi Jorge,

    Your professor's answer does not surprise me. The number of engineers
    I knew who ignore this capability is rather high.
    I do agree with Stéphane's mathematics formulas. The silicon physical
    reality could be slightly different though.
    The Mismatch data as provided in your model cards are extracted for
    well defined structures within well defined limits. Your foundry does
    not guaranty any mathematical continuity if your design structure is
    different from those used for mismatch data extraction.

    BTW, why don't you run few MC simulation with/without correlation to
    see what's the impact on your output ? We tend sometimes to argue on
    very little tiny things that end up with no impact at all. You can use
    a dcmatch analysis if this is possible for you, this will give you a %
    of impact. MC simulations are rather time-consuming for big designs.

    Please bear in mind that what we do in industry is slightly different
    from what we learn in the academia. When we design a chip for mass
    production, it is common to make some over-design to ensure that all
    the cases are covered, we don't take any chance as we do for R&D
    projects. In other words, what is meant to be couple of transistors
    for a differential pair in the theory could end up with many
    transistors around for any sort of trimming.

    I have written few notes about some useful mathematics I did use when
    designing LDO voltage regulators. You will find some stats in French :-
    (
    http://riad-kaced-usenet-group.goog...rRp7kbrQuQTkuyp0rhe4k7aUzfKN-m9S9niuHrq-IEXAE

    But if you don't want to waste plenty of time understanding French for
    4 pages of mathematics, then go for any descent 'Mathematics for
    Engineers' book as Stéphane mentioned earlier. I've got one at my
    office, I can send you the title/author later on if you want.

    Cheers,
    Riad.
     
    Riad KACED, Sep 14, 2008
    #8
  9. Hi Riad, thanks a lot for your reply! I indeed checked a little and
    ran some simulations in order to see the effect of the correlation
    parameter in my design. The circuit in which I am working is a dynamic
    differential comparator, and the problem is that...

    ....If I use relatively-small transistors I get too high offset
    voltages due to excesive mismatch, and
    ....If I use large transistors, the offset is reduced but the
    comparator turns too slow to communte in the alloted time.

    However, if I use the infamous correlation factor, with, say, cc=0.75,
    then the monte carlo results seem to be a good compromise between
    offset and speed. The problem is... should I trust these
    simulations? :O

    Anyhow, I think I've gotten now a more clear idea about the rationale
    behind this parameter and its use. Thanks a lot also for the
    statistics review: my french is real-beginner level, but I am always
    looking forward to improving it. And after all, once one learns
    spanish (mother tongue) and italian (laboral tongue), understanding
    any other romance language is very easy, I guess! :D

    Muchos saludos,

    Jorge.
     
    spectrallypure, Sep 17, 2008
    #9
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