MIXED SIGNAL SIMULATION

Discussion in 'Cadence' started by RAO_VINAY, Dec 26, 2009.

  1. RAO_VINAY

    RAO_VINAY Guest

    hi,,
    I am using ic5141 and wrote a simple verilog-ams code for 1-bit DAC
    where input is digital signal and output is analog.After that i
    instantiated in schematic window for simulating it.
    I reffered manuels to simulate this but i am not getting any proper
    idea for simulating mixed design.
    For simulating any design, is it compulsory to go for "config"
    views rather than simple schematic view??
    Whats the need of config view if we dnt have any hierarchial design??
     
    RAO_VINAY, Dec 26, 2009
    #1
  2. RAO_VINAY

    Riad KACED Guest

    Hi,

    You can simulate your Mixed signal ADC using the AMS simulator from
    ADE. As you mentioned, you need a config view as a start point. The
    Config view allows you switching between different views of your
    design. Say for example your ADC is a simple verilog-AMS file as for
    now. Later on, you may make a physical design for it, i.e. a
    transistor level schematic and ultimately a physical layout. A config
    view allows you simulating either representation from one single
    testbench.
    Look at the AMS documents in your IC/IUS streams.

    Regards,
    Riad.
     
    Riad KACED, Dec 28, 2009
    #2
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