macro lvs

Discussion in 'Cadence' started by tnk, Sep 2, 2004.

  1. tnk

    tnk Guest

    Hi all,
    I used silicon ensemble to do layout and streamed to the layout
    editor. When I did flat lvs, there is no error or warning. But when I
    did macro lvs, some of the macro cells are not matched with schematic.
    May I know why? I've already assigned ivCellType to macro to all the
    normal cell and graphic to Filler cell. By the way, I am doing full
    custom, so I am not using standard cell library. So the layout cell
    view is not abstract_mlvs, but layout. Is it the root of problem...
    the rule is diva lvs rule. Thanks in advance...

    tnk
     
    tnk, Sep 2, 2004
    #1
  2. You have to have both the layout and schematic stop netlisting at the
    same level of detail. The detail level of the layout is controlled by
    how you extract. Flat gets you transistors and such. Macro gets you
    logic blocks (macro cells). When you extract with macro cells, you also
    have to have the schematic netlisting treat the equivalent symbols as
    leaf nodes of the netlist. Usually you use macro cell mode because there
    are no schematics to go with the low level symbols, so the level of
    detail is not at the transistors.

    I would say that your schematics expand all the way down to transistors,
    which causes LVS to compare transistors to macro cells.
     
    Diva Physical Verification, Sep 2, 2004
    #2
  3. tnk

    tnk Guest

    actually I imported the schematic from verilog file and I have every
    symbols view. What I want is hierarchical hspice file of layout. Is
    there any way to stop the schematics expanding all the way down to
    transistors level? I thought by setting macro LVS will do the trick,
    but pratically it is not...

    tnk
     
    tnk, Sep 2, 2004
    #3
  4. It's probably a matter of arranging a switch/stop list for Diva LVS netlisting
    so that it stops at the gate level.

    Take a look at the example .simrc file in <instdir>/tools/dfII/cdsuser
    and look for lvsSchematicStopList - you can set these variables in your
    own .simrc file to override the default. Of course, there would need to be
    some sort of view at the level you want to stop at (and this view must
    be in both the switch (lvsSchematicViewList) and the stop list
    (lvsSchematicStopList) for it to stop there. Also, the lvsSchematicViewList
    (like other view switch lists in DFII netlisting) is searched in order from
    left to right, descending into the first view it finds in that list for each
    cell.

    Regards,

    Andrew.
     
    Andrew Beckett, Sep 3, 2004
    #4
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