Hi all, I am having terrible trouble trying to do a simple lvs on a standard cell. I have an inverter instanciated in my test schematic. I have a cdl netlist supplied for this inverter. It will not LVS. I have included the netlist under the netlisting options on the top of the assura form - I am not sure if it is even being used and I get an error saying lastSchemticProperty was not set on my testbench schematic. I don't want to use block boxes. We have a cdl with transistors so I really want to compare. Someone must have encountered this problem before....any ideas/help? regards kev