Lookup Table in Verilog-A

Discussion in 'Cadence' started by Shanthi Pavan, Feb 23, 2004.

  1. Shanthi Pavan

    Shanthi Pavan Guest

    Hi,

    I want to implement a look-up table in Verilog-A. Earlier posts
    indicate that it is possible, but I couldnt find any refrence to this
    in the Verlilog-A documentation. Am I missing something here ? Any
    help is greatly appreciated.

    -Shanthi
     
    Shanthi Pavan, Feb 23, 2004
    #1
  2. Shanthi Pavan

    Andrew Beckett Guest

    $table_model is the function you're looking for. Search for table_model should
    find it in the docs.

    Andrew.
     
    Andrew Beckett, Feb 23, 2004
    #2
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