linking cdf params and spectre netlist

Discussion in 'Cadence' started by kev, Jan 10, 2007.

  1. kev

    kev Guest

    Hi,

    I am trying to simulate some standard cells from ARM. All they have
    provided are the backend views without schematic [as they do not
    support this and neither do tsmc]. tech is tsmc 0.18um
    I have the symbols, I have the cdl netlist for the standard cell lib.
    So being a typical engineer, I try to simulate only an inverter - I
    mean how hard can it be!
    Only it doesn't invert!the output is not the same as the input - there
    seems to be some cap loading but otherwise I ahve a nice buffer with
    the invx1 cell! [At least it is netlisting and simulating .... ;-) )

    I have done the following:
    1. converted the netlist to spectre format and cahnegd the model names
    to pch and nch.

    simulator lang=spectre
    subckt INVX1 Y A
    M0 ( Y A VSS VSS ) nch l=0.18u w=0.6u
    M1 ( VDD A Y VDD ) pch l=0.18u w=0.9u
    ends INVX1

    2. copied the symbol view a spectre view [doesn't seem to simulate
    otherwise]

    3. Edited the base cdf parameters.
    i.e. simulation info - spectre

    componentName = INVX1
    termOrder = "Y" "A"

    Is there something else I need to add/edit? [obviously there is...]

    Could someone please shed some light on this for me.....

    regards
    Kevin
     
    kev, Jan 10, 2007
    #1
  2. kev

    kev Guest

    Ok, I have added VDD and VSS pins and now my inverter works!
    So how does one pass globals correctly?

    Previously I added a netset property VDD=vdda VSS=vssa where vdda and
    vssa were
    wires on my testbench.
     
    kev, Jan 10, 2007
    #2
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