Interconnect delay annotation in VerilogXL

Hi all
I am trying to do SDF backannotaion in VerilogXl. But i am getting
some wierd results using INTERCONNECT keyword. when i use interconnect
delay in my sdf file all the IOPATH sdfannotation doesnot work.
after using this SDF file my IOPATH sdfannotation does not work.
here is my sdffile

DELAYFILE
(SDFVERSION "2.1")
(DESIGN "STFBtest")
(DATE "October 1, 2004 00:40:2")
(VENDOR "")
(PROGRAM "PEARL")
(VERSION "PEARL 4.3-p025")
(DIVIDER /)
(VOLTAGE 2.500:2.500:2.500)
(PROCESS "1.000:1.000:1.000")
(TEMPERATURE 25.000:25.000:25.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "cir")
(INSTANCE cir)
(DELAY
(ABSOLUTE
(INTERCONNECT B I0/a (0.105000:0.105000:0.105000)
(0.10500:0.105000:0.105000))
(INTERCONNECT A I0/b (0.001277:0.001277:0.001277)
(0.001277:0.001277:0.001277))
(INTERCONNECT I4/out C (0.000110:0.000010:0.000010)
(0.000010:0.000010:0.000010))
(INTERCONNECT I0/out I4/a (0.000167:0.000167:0.000167)
(0.000167:0.000167:0.000167))
)
)
)
(CELL
(CELLTYPE "INV1X")
(INSTANCE I4)
(DELAY
(ABSOLUTE
(IOPATH a out (1.136806:1.136806:1.136806) (1.5:1.5:1.5))
)
)
)
(CELL
(CELLTYPE "NAND2X2")
(INSTANCE I0)
(DELAY
(ABSOLUTE
(IOPATH a out (1.128328:1.128328:1.128328)
(1.138328:1.138328:1.138328))
(IOPATH b out (1.128328:1.128328:1.128328)
(1.138328:1.138328:1.138328))
)
)
)
)


Please help with this
pankaj