How to simulate a netlist - no schematic available????

Discussion in 'Cadence' started by Samiran, Feb 23, 2010.

  1. Samiran

    Samiran Guest

    Hi guys.

    I have to simulate a netlist corresponding to a circuit, but I don't
    have the schematic of that. How I can correctly simulate the topology
    (AC simulation)?

    I have tried simulating the netlist by ocean script after creating the
    same directory structure as automatically created by cadence inside
    the simulation directory [I created:
    "/home/samiran/simulation/cell_name/spectre/schematic/netlist"
    directories. Inside "netlist" folder, I placed "netlist",
    "netlistFooter", "netlistHeader" files, and one more folder named -
    "amap" and created all necessary files that should be residing inside
    "amap" folder]. But it didn't give me the correct result.

    I have independently simulated the correspondent schematic by ocean
    script and it gave correct result. I am not sure how to debug it. Is
    there any relevant reference doc I can look into?

    Please help me asap..I am fighting with it for last three days for
    vain!!!!

    Thanks & regards
    Samiran
     
    Samiran, Feb 23, 2010
    #1
  2. Samiran

    rick Guest

    Hi Samiran - what type of netlist do you have? If a CDL, you can
    import the
    CDL and create a schmatic. If you dont have a CDL, heres a few
    workarounds.

    1) Ive heard of tools that create a schematic from the layout. There
    is probably a
    skill routine that will also do this.
    2) You could create a schematic from Assura using Solution ID:
    11006792 which
    shows how to run RCX without a schematic. It generates an Assura
    netlist for layout
    which can then be used a schematic. Once you have the .sdb file from
    above, you
    can then run the assura command vldbToCdl and import the
    result. Kinda a round
    about but it should work

    Rick
     
    rick, Feb 23, 2010
    #2
  3. Samiran

    Samiran Guest

    Hi Rick,

    Its a simple netlist consisting of only passive components.....!!! And
    one more thing - why you are talking about generation of schematic -
    is the schematic required to simulate the netlist?? I want to simulate
    the netlist w/o generating any schematic. Is there any way out?

    Thanks,
    Samiran
     
    Samiran, Feb 24, 2010
    #3
  4. Samiran wrote, on 02/23/10 07:00:
    Hi Samiran,

    There's no need to create an "amap" folder - all you need is netlist,
    netlistHeader and netlistFooter (the last two can be empty files, but must exist).

    You only say "But it didn't give me the correct result". Unfortunately that's
    not much for me to go on - what you're doing _ought_ to work, but since you gave
    no details as to:

    a) what your OCEAN script looked like
    b) what the actual problem was

    it's virtually impossible for me to guess what you've done wrong. I don't,
    unfortunately, have a crystal ball at my disposal.

    Regards,

    Andrew.
     
    Andrew Beckett, Feb 24, 2010
    #4
  5. Samiran

    Samiran Guest

    Due to a little mistake in netlisting the result was wrong. Now I am
    getting desired result. But when I run the script w/o the amap folder
    the simulation is going on fine, but after the simulation is over I
    got an error:
    _______________________________________________________________________________________________________________________
    *Error* quotient: can't handle (nil / nil)
    *Error* load: error while loading file - "testcsa.ocn"
    _______________________________________________________________________________________________________________________


    This is how the netlist looks like:
    _______________________________________________________________________________________________________________________
    // Library name: Samiran
    // Cell name: TestMyCkt
    // View name: schematic
    COUTPUT (net9 0) capacitor c=1p
    RM2 (0 net9) resistor r=1/gdM2
    RM1 (net9 0) resistor r=1/gdM1
    VINPUT (net013 0) vsource mag=1m type=sine ampl=1m freq=1K
    GM1 (net013 0 net9 0) vccs gm=gmM1
    _______________________________________________________________________________________________________________________


    And this is how the script ("testcsa.ocn") looks like:
    _______________________________________________________________________________________________________________________
    ocnWaveformTool( 'wavescan )
    simulator( 'spectre )
    design( "/home/sdam/simulation/TestMyCkt/spectre/schematic/netlist/
    netlist")
    resultsDir( "/home/sdam/simulation/TestMyCkt/spectre/schematic" )
    modelFile(
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    core_rf_v2d4.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    io_rf_v2d3.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    l_slcr20k_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    mimcapm_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_MIMCAP_V101.lib.scs" "mimcaps_typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_REG18BPW_V123.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_REG18_V124.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_REG33BPW_V123.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_REG33_V114.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_RES_V133.lib.scs" "res_typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_ZVT18_V121.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_ZVT33_V113.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_LVT33_V113.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_LVT18_V113.lib.scs" "tt")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    pad_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    rnhr_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    rnnpo_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    rnppo_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    vardiop_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    varmis_18_rf_v2d3.lib.scs" "typ")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_BJT_V112.mdl.scs" "")
    '("/usr/local/cadence/umc/UMC_18_CMOS/../Models/Spectre/
    MM180_DIODE_V113.mdl.scs" "")
    )

    gmM1 = 3.038m
    gdM1 = 77.86u
    gdM2 = 69.09u

    p1 = outfile( "/home/sdam/csa.csv" "w" )

    analysis('ac ?start "0" ?stop "1" ?annotate "status" )
    desVar( "gdM2" gdM2)
    desVar( "gmM1" gmM1)
    desVar( "gdM1" gdM1)
    envOption(
    'vcoType ""
    'pllPlugin ""
    'firstRun nil
    'enableArclength nil
    'recover ""
    'checkpoint ""
    'spp ""
    'autoDisplay t
    'userCmdLineOption ""
    'analysisOrder nil
    'paramRangeCheckFile ""
    )
    option( 'reltol "1e-3"
    'vabstol "1e-6"
    'iabstol "1e-12"
    'temp "27"
    'tnom "27"
    'scalem "1.0"
    'scale "1.0"
    'gmin "1e-12"
    'rforce "1"
    'maxnotes "5"
    'maxwarns "5"
    'digits "5"
    'cols "80"
    'pivrel "1e-3"
    'ckptclock "1800"
    'sensfile "../psf/sens.output"
    'dochecklimit "no"
    'checklimitdest "psf"
    )
    saveOption('save "allpub" )
    saveOption( 'pwr "" )
    saveOption( 'nestlvl "" )
    saveOption( 'currents "" )
    saveOption( 'subcktprobelvl "" )
    saveOption( 'useprobes "" )
    saveOption( ?saveahdlvars "" )
    saveOption( ?modelParamInfo t )
    saveOption( ?elementInfo t )
    saveOption( ?outputParamInfo t )
    temp( 27 )
    run()
    Av = value(mag((VF("/net9") / VF("/net013"))) 0)
    plot( dB20((VF("/net9") / VF("/net013"))) )
    fprintf( p1 "%g %g %g" 1/(1000000*gmM1) gdM1*1000000 gdM2*1000000 1/
    Av)
    newline(p1)
    _______________________________________________________________________________________________________________________


    Regards,
    Samiran
     
    Samiran, Feb 25, 2010
    #5
  6. Samiran wrote, on 02/25/10 05:30:
    The problem is that you are referring to net names using "schematic names"
    rather than "netlist names". Any name which begins with a "/" is assumed to be
    the name in the schematic, and needs to be mapped to the corresponding netlist
    name - using spectre's hierarchy delimiters, etc. If it doesn't begin with a
    "/", it is assumed to be a netlist name.

    So you probably just need:

    Av = value(mag(VF("net9") / VF("net013")) 0)
    plot( dB20(VF("net9") / VF("net013")) )

    Assuming that's what the nets are called in the actual netlist.

    Regards,

    Andrew.
     
    Andrew Beckett, Feb 25, 2010
    #6
  7. Samiran

    Samiran Guest

    Thanks!!! It worked!!!!!
     
    Samiran, Feb 25, 2010
    #7
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