How to make verilogA work?

Hello everyone,

I'm a freshman of using veriloga. Recently our group wants to create
our own behavior model based on veriloga. At this beginning stage, we
just copied Cadence veriloga model to our library then modify the
code. But we found that it doesn't followed our code in simulation
since this file: netlist.oa cannot be updated for simulation.

Does anyone know how to make the veriloga code work in simulation? Do
we need verilogA license to combine code and generate netlist.oa to
run simulation? Thanks.

Regards,

Mobil

 

Mobil wrote, on 02/04/09 23:38:

Mobil,

Are you modifying the code within virtuoso? (i.e. opening the view in edit mode,
making the change, saving and exiting the editor). This will trigger the syntax
checker and parser, which will update the info in the netlist.oa file so that
the netlister knows about the I/O of the veriloga model, and any hierarchy
within it.

If you edit the file from UNIX outside, this will not happen.

There's no VerilogA license - all you need is a spectre license to simulate it
(or AMS if using AMS Designer).

Regards,

Andrew.

 

You're right Andrew, we edited code from UNIX shell outside. Thank you
very much.