How to get the cell name list of one library?

Hello everyone,

In one shell script, I wanna get the cell name list of a library, and the
library isn't in the current directory, how should I do?

Thanks for your help!

B.R.

Joffre

 

why dont you try

ddGetObj("libname")~>cells~>name

gives you a nice list!

 

Thanks for your answer!

Since it's one shell script, how may I run the skill function to get the
cell list?

 

you could write in shell

for file in ` ls $LIBDIR | grep -v prop.xx `
do
echo Found Cell $file
done

 

It's difficult to find the absolute path of the library, since some
libraries is included such as:
INCLUDE ...../cds.lib

If user give one library name, the script find all the cell inside directly
and deal with them, that's my request.

Thanks for your help!

 

the tool

cdsLibDebug might be your friend, if you parse its output

 

Keep in mind that the above will only work for CDBA database as the
prop.xx file goes away in OA. If you need this info in OA, you could
use the python API and access the database directly. This also
accounts for the cds.lib issue as the you can use Cadence's look up
method.

 

You could use dbAccess to launch the SKILL file which Guenther gave earlier,
which can then print out the contents of the library. dbAccess will read the the
cds.lib file, and then the SKILL code will be able to access the library.

Andrew.

 

Andrew,

Thanks for your answer!

I wanna write one shell script to deal with the cells in some library, not
do it in skill code. Either It's good to get the library's path through the
library name.

B.R.

Joffre

 

I like that cdsLibDebug suggestion if for no other reason than not a
lot of folks know that they would benefit by running cdsLibDebug every
time they start up Virtuoso in a new or unfamiliar design hierarchy.

As always, so all benefit, here is a cut-and-paste example of using
cdsLibDebug on a cds.lib hierarchy (one that includes other files and
handles a full chip of analog, memory, mixed-signal, and digital
blocks).

The example is from a half-dozen years ago when we designed and built
the first wholly-EDA-delivered complete chip, generic process design
kit, and documented POR reference flow ... nicknamed "Eaglet".

John Gianni
--
Nothing stated here is prior reviewed nor sanctioned by anyone!




****************************************************************************
A quick example using cdsLibDebug on the UNIX commane line to parse
cds.lib:
By John Gianni, 4/15/2002
****************************************************************************
1. Obtain the help for the cdsLibDebug parsing command:

% cdsLibDebug -h
REPORTS:
Usage:
/cds_root/tools/bin/32bit/cdsLibDebug [-cdslib cdslib] [-cla] [-
help]
-cdslib cdslib: override default searching for cds.lib
-cla: use CLA semantics
-help: this message
============================================================================
2. Test a reasonably complex chip hierarchy containing some include
files:

% cd /eaglet/design

Note:
This Eaglet garage-door-opener design was used because it contained
a reasonably complex cds.lib containing include files and analog
blocks (e.g., the op amp), mixed-signal blocks (e.g., the PLL and
the ADC), memory blocks (e.g., the RAMs & ROM), RF blocks (e.g.,
the LNA &, Mixer), digital blocks (e.g., the FFT DSP, DMA, &
DTMF),
and a full set of ESD I/O pads for the analog, rf, & digital
domains.
============================================================================
3. Run the cdsLibDebug parsing command in "cla" mode on the default
cds.lib:

% cdsLibDebug -cla
REPORTS:
Parsing cdslib file ./cds.lib.

cds.lib files:
1: /eaglet/design/custom/cds.lib
2: /eaglet/design/custom/cds.lib.dir/cds.lib.include
included on line 3 of /eaglet/design/custom/cds.lib
3: /eaglet/design/custom/cds.lib.dir/cds.lib.include.pll
included on line 12 of /eaglet/design/custom/cds.lib.dir/
cds.lib.include
4: /eaglet/design/custom/cds.lib.dir/cds.lib.include.assura
included on line 13 of /eaglet/design/custom/cds.lib.dir/
cds.lib.include
5: /eaglet/design/custom/cds.lib.dir/cds.lib.include.fullchip
included on line 14 of /eaglet/design/custom/cds.lib.dir/
cds.lib.include
6: /eaglet/design/custom/cds.lib.dir/cds.lib.include.rfblock
included on line 15 of /eaglet/design/custom/cds.lib.dir/
cds.lib.include
7: /eaglet/design/custom/cds.lib.dir/cds.lib.include.adcblock
included on line 16 of /eaglet/design/custom/cds.lib.dir/
cds.lib.include
8: /eaglet/design/custom/cds.lib.dir/cds.lib.include.memory
included on line 17 of /eaglet/design/custom/cds.lib.dir/
cds.lib.include

Libraries defined:

Defined in /eaglet/design/custom/cds.lib.dir/cds.lib.include:
Line # Filesys Path
------ ---- ----
6 gpdk /eaglet/share/lib/gpdk_db/gpdk
7 diglib /eaglet/share/lib/diglib
8 connectLib /eaglet/share/lib/connect_lib/connectLib

Defined in /eaglet/design/custom/cds.lib.dir/cds.lib.include.pll:
Line # Filesys Path
------ ---- ----
1 amsPLL /eaglet/design/dfiidata/amsPLL

Defined in /eaglet/design/custom/cds.lib.dir/
cds.lib.include.fullchip:
Line # Filesys Path
------ ---- ----
1 fullchip /eaglet/design/dfiidata/fullchip
2 gsclib /eaglet/share/lib/gsclib_1.0/gsclib
3 gsclib_IO /eaglet/share/lib/gsclib_IO/gsclib_IO
4 final_tools /eaglet/design/dfiidata/final_tools

Defined in /eaglet/design/custom/cds.lib.dir/
cds.lib.include.rfblock:
Line # Filesys Path
------ ---- ----
4 opamp /eaglet/design/dfiidata/opamp
5 rficLib /eaglet/design/dfiidata/rficLib
6 rfLib /cds_root/tools/dfII/samples/artist/rfLib
7 ahdlLib /cds_root/tools/dfII/samples/artist/ahdlLib

Defined in /eaglet/design/custom/cds.lib.dir/
cds.lib.include.adcblock:
Line # Filesys Path
------ ---- ----
1 adc /eaglet/design/dfiidata/adc

Defined in /eaglet/design/custom/cds.lib.dir/cds.lib.include.memory:
Line # Filesys Path
------ ---- ----
1 GSPRAMtiles /eaglet/share/lib/GSPRAM/GSPRAMtiles
2 GSPRAMsch /eaglet/share/lib/GSPRAM/GSPRAMsch
3 memory /eaglet/design/dfiidata/memory

Defined in /eaglet/design/custom/cds.lib.dir/cds.lib.include:
Line # Filesys Path
------ ---- ----
21 basic /cds_root/tools/dfII/etc/cdslib/basic
22 analogLib /cds_root/tools/dfII/etc/cdslib/artist/
analogLib
24 US_8ths /cds_root/tools/dfII/etc/cdslib/sheets/
US_8ths
26 cdsDefTechLib /cds_root/tools/dfII/etc/cdsDefTechLib
============================================================================
REFERENCE:
============================================================================
Here is the cds.lib file which was parsed by cdsLibDebug for results
above:

% cat /eaglet/design/cds.lib
REPORTS:
-- File Created by John Gianni, January 2002
INCLUDE ./cds.lib.dir/cds.lib.include
-- DEFINE gsclib /eaglet/share/lib/gsclib_1.0/gsclib
-- DEFINE final_tools /eaglet/design/dfiidata/final_tools
-- DEFINE fullchip /eaglet/design/dfiidata/fullchip
-- DEFINE memory /eaglet/design/dfiidata/memory
-- DEFINE gpdk /eaglet/share/lib/tsmcLib/gpdk
============================================================================
Here is one include file which was called by cds.lib giving results
above:

% cat /eaglet/design/cds.lib.dir/cds.lib.include
REPORTS:
--
-------------------------------------------------------------------
-- File Created by John Gianni, January 2002
-- (Note: This file can be part of main cds.lib once PCR 428960 is
done)
-- PCR 428960 filed 02-15-2002 by Ray V. for comment preservation.
--
-------------------------------------------------------------------
-- Begin: Load eaglet rf/a/ms/d garage-door opener libraries
--
-------------------------------------------------------------------
DEFINE gpdk /eaglet/share/lib/gpdk_db/gpdk
DEFINE diglib /eaglet/share/lib/diglib
DEFINE connectLib /eaglet/share/lib/connect_lib/connectLib
--
-------------------------------------------------------------------
-- Begin: Load block and full-chip libraries, if they exist
-- (Note, replace with "SOFTDEFINE" once that feature exists; PCR
442127)
-- PCR 442127 filed 04-24-2002 by Kent L. for a SOFTDEFINE
capability.
SOFTINCLUDE /eaglet/design/custom/cds.lib.dir/cds.lib.include.pll
SOFTINCLUDE /eaglet/design/custom/cds.lib.dir/cds.lib.include.assura
SOFTINCLUDE /eaglet/design/custom/cds.lib.dir/
cds.lib.include.fullchip
SOFTINCLUDE /eaglet/design/custom/cds.lib.dir/
cds.lib.include.rfblock
SOFTINCLUDE /eaglet/design/custom/cds.lib.dir/
cds.lib.include.adcblock
SOFTINCLUDE /eaglet/design/custom/cds.lib.dir/cds.lib.include.memory
--
-------------------------------------------------------------------
-- Begin: Load COMMON libraries
--
-------------------------------------------------------------------
DEFINE basic ${CDSHOME}/tools/dfII/etc/cdslib/basic
DEFINE analogLib ${CDSHOME}/tools/dfII/etc/cdslib/artist/
analogLib
-- DEFINE sample ${CDSHOME}/tools/dfII/samples/cdslib/sample
DEFINE US_8ths ${CDSHOME}/tools/dfII/etc/cdslib/sheets/US_8ths
--

 

John,

Thanks for your answer.
It is a good way to get some library's path through cdsLibDebug's output .
That's my aim.

Joffre