How to avoid implicit netlisting in AMS simulator

Discussion in 'Cadence' started by Sunil_rpine, Feb 18, 2009.

  1. Sunil_rpine

    Sunil_rpine Guest

    Hi,

    I am using AMS simulator with OSS netlisting for ncvlog, ncelab,
    ncsim. I am running it in the debug mode. When I look at the schematic
    tracer, I can see that the connections are jumbled up. I think there
    was some implicit connections are happening. To avoid this I added
    simVerilogNetlistExplicit = t; hnlVerilogNetlistExplicit = t and
    hnlVerilogNetlistBehavioralExplicit = t; in my .cdsinit. Still the
    problem is not solved. Can you please help me out.

    Thank you,
    Sunil
     
    Sunil_rpine, Feb 18, 2009
    #1
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