floorplanning

Discussion in 'Cadence' started by vlsijothi, Jun 20, 2005.

  1. vlsijothi

    vlsijothi Guest

    hi all,

    i have doubt in floorplanning the design in ASIC

    1. when we go for flattened floorplanning or hierarchical
    floorplanning.what is the adv and disadv of each of this?

    2. what is the adv and disadv of hardmacro and softmacro?

    3. A design is floorplanned with hard macro,my question is
    whether chip area is more for floorplaning with hard macro
    then the floorplanning with standard cells only(without
    using hard macros). which is best? what is the adv and
    disadv of each of this?


    thanks in advance,
    jothi murugan.B
     
    vlsijothi, Jun 20, 2005
    #1
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