Extraction of nfet and pfet

I can't extract nfet and pfet with this divaEXT.rul file.


(drcExtractRules
(bkgnd = (geomBkgnd))
(pdiff = (geomOr "pdiff"))
(ndiff = (geomOr "ndiff"))
(pwell = (geomOr "pwell"))
(metal1 = (geomOr "metal1"))
(metal2 = (geomOr "metal2"))
(metal3 = (geomOr "metal3"))
(metal4 = (geomOr "metal4"))
(cont = (geomOr "contact"))
(poly = (geomOr "poly"))

(adlvtn = (geomOr "adlvtn"))
(nplus = (geomOr "nplus"))
(active = (geomOr "active"))

(sub_1 = (geomAnd adlvtn nplus))
(sub__SD = (geomAnd sub_1 active))
(sub__SD_2 = (geomAndNot sub__SD poly))
(sub__SD_3 = (geomAnd sub__SD_2 sub__SD))
(sub_1_2 = (geomAndNot bkgnd sub__SD))

(pgate = (geomAnd poly pdiff))
(ngate = (geomAnd poly ndiff))
(nsd = (geomAndNot ndiff ngate))
(psd = (geomAndNot pdiff pgate))
(via = (geomOr "v1"))
(via1 = (geomOr "v2"))
(via2 = (geomOr "v3"))
(Ptap = (geomAnd psd pwell))
(Ntap = (geomAndNot nsd pwell))
(sub = (geomAndNot bkgnd pwell))

(ivIf
(switch "do_pre") then
(measureResistance poly "lrescap" 25 0.56
"r"
(cap "c"
((1.6e-17 * a) + (2.8e-18 * p))
)
(ignore <= 0.05)
(save "y1")
(contact cont 0.03 0.5)
)
)


(ivIf
(switch "drc?") then
(drc pwell
(width < 1.8) "Minimum P- width = 1.8"
)
;;(drc pwell
;; (sep < 4.2) diffNet "P- to P- spacing = 4.2"
;
(drc nsd psd
(sep < 0.9) diffNet
"Ndiff to Pdiff on different nets = 0.9"
)
(badPdiff = (geomStraddle psd pwell))
(saveDerived badPdiff "Pdiff straddling Pwell")
(drc nsd pwell
(sep < 0.6) "Ndiff (substrate contact) to P-well = 0.6"
)
(drc pwell nsd
(enc < 0.6) "Ndiff (inside P-well) to P-well edge = 0.6"
)
(diffusion = (geomOr pdiff ndiff))
(drc diffusion
(width < 0.6) "Minimum Source/Drain interconnect width = 0.6"
)
(drc diffusion
(sep < 0.6) "Minimum Source/Drain spacing = 0.6"
)
(drc poly
(width < 0.6) "Minimum poly width = 0.6"
)
(drc poly
(sep < 0.6) "Minimum poly to poly spacing = 0.6"
)
(drc poly diffusion
(enc < 0.9) "Minimum gate overlap field = 0.9"
)
(gate = (geomAnd poly diffusion))
(drc diffusion gate
((0 < enc) < 1.2) opposite
"Minimum gate to diffusion edge = 1.2"
)
(drc poly diffusion
(sep < 0.3) "Minimum poly in field to edge of diffusion = 0.3"
)
(drc pimplant psd
((0 < enc) < 0.3) "P-implant overlap of S/D = 0.3"
)
(drc pimplant nsd
((0 < sep) < 0.3) "N Diff to P-implant = 0.3"
)
(drc pimplant
(sep < 0.3) "Minimum P-implant mask spacing = 0.3"
)
(drc pimplant
(notch < 0.3) "Minimum P-implant mask spacing (notch) = 3"
)
(buttcon = (geomStraddle cont ndiff))
(badcon = (geomAndNot cont
(geomCat diffusion metal1)
))
(nTapCon = (geomInside cont Ntap))
(pTapCon = (geomInside cont Ptap))
(tapCon = (geomOr nTapCon pTapCon))
(noTapCon = (geomAndNot cont tapCon))
(saveDerived badcon "Contacts not inside diffusion or metal1 are bad
contacts")
(saveDerived buttcon "Butting contacts not allowed in this design")
(drc cont
(width < 0.6) "Minimum contact size = 0.6"
)
(drc cont
(width < 1.9)
(1.9 < length) "Maximum size of contact .9 x .9"
)
(drc cont
(4 < area) "Maximum size of contact .9 x .9"
)
(drc cont
(sep < 0.6) "Minimum contact spacing = 0.6"
)
(drc diffusion noTapCon
(enc < 0.6) "Nidff, Pidff diffusion overlap contacts = 0.6"
)
(drc diffusion tapCon
(enc < 0.3) "Nidff, Pidff diffusion overlap well tap contacts =
0.3"
)
(drc cont gate
(sep < 0.6) "Nidff, Pidff diffusion contacts to poly gate = 0.6"
)
(drc poly cont
(enc < 0.3) "poly overlap contacts = 0.3"
)
(drc metal1
(width < 0.6) "Metal width = 0.6"
)
(drc metal1
(sep < 0.6) "Metal spacing = 0.6"
)
(drc metal1 cont
(enc < 0.6) "Minimum Metal overlap contacts = 0.6"
)
(Badvia = (geomAnd via cont))
(saveDerived Badvia "Via not allowed over metal-to-diffusion
contact")
(drc via
(width < 0.6) "Minimum via opening = 2"
)
(drc via
(width < 0.9)
(0.9 < length) "Max via = .9 x .9"
)
(drc via
(0.81 < area) "Max via = .9 x .9"
)
(drc via
(sep < 1.2) "Minimum via spacing = 1.2"
)
(drc poly via
(sep < 0.3) "Via to poly = 0.3"
)
(drc cont via
(sep < 0.6) "Via to contact = 0.6"
)
(drc metal1 via
(enc < 0.6) "Metal1 overlap of via = 0.6"
)
(drc metal2
(width < 0.6) "Metal2 minimum width = 0.6"
)
(drc metal2
(sep < 0.6) "Metal2 minimum spacing = 0.6"
)
(drc metal2 via
(enc < 0.6) "Metal2 overlap via = 0.6"
)
)
(ivIf
(switch "extract") then

(geomConnect
via(via cont poly metal1 psd nsd)
via(via cont sub__SD metal1)
via(via cont sub__SD_2 metal1)
via(via cont sub__SD_3 metal1)
via(via cont sub_1 metal1)
via(via cont sub_1_2 metal1)

label("v1" metal1 metal2)
label("v1" via1 metal2 metal3)
label("v1" via2 metal3 metal4)
label("v1" Ptap pwell psd metal1)
label("v1" Ntap sub nsd metal1)

label("v1" cont sub__SD_3 metal1)

)

(extractDevice pgate
(poly "G")
(psd "S" "D")
(sub "B")
"pfet ivpcell"
)


(extractDevice ngate
(poly "G")
(sub__SD_3 "S" "D")
(sub_1_2 "B")
"nfet ivpcell"
)


(wp = (measureParameter length
(pgate coincident poly) 5e-07
))
(wn = (measureParameter length
(ngate coincident poly) 5e-07
))
(lp = (measureParameter length
(pgate inside poly) 5e-07
))
(ln = (measureParameter length
(ngate inside poly) 5e-07
))
(saveParameter lp "l")
(saveParameter ln "l")
(saveParameter wp "w")
(saveParameter wn "w")

(polymetal = (measureParasitic area
(metal1 over poly) 2.8e-16 two_net
))
(polymetal2 = (measureParasitic area
(metal2 over poly not_over metal1) 2.4e-16 two_net
))
(met2met1 = (measureParasitic area
(metal2 over metal1) 2e-16 two_net
))
(saveParasitic polymetal "PLUS" "MINUS" "c"
"pcapacitor"
)
(saveParasitic polymetal2 "PLUS" "MINUS" "c"
"pcapacitor"
)
(saveParasitic met2met1 "PLUS" "MINUS" "c"
"pcapacitor"
)
(saveRecognition ngate "poly")
(saveRecognition pgate "poly")

(saveInterconnect metal1 poly pwell metal2 metal3 metal4)

)
)



This is is the report after extraction:


\a setExtForm()
\p >
\a hiFormDone(ivExtOptionsForm)
\o
\o Extraction started at Tue Feb 17 17:13:47 2004
\o
\o
\o library: FF_NO_LEAK
\o cell: VGND_FF_BALL_2
\o view: layout
\o Rules source is a simple file.
\o Rules path is /home/remol/WORK_CADENCE/divaEXT2_group.rul.
\o Inclusion limit is set to 1000.
\o Switches used: extract.
\o Running layout extraction analysis
\o flat mode
\o Full checking.
\o 50 pcapacitor parasitics created.
\o 0 pcapacitor parasitics created.
\o 0 pcapacitor parasitics created.
\o saving rep FF_NO_LEAK/VGND_FF_BALL_2/extracted
\o Extraction started.......Tue Feb 17 17:13:47 2004
\o completed ....Tue Feb 17 17:13:48 2004
\o CPU TIME = 00:00:00 TOTAL TIME = 00:00:01
\o ********* Summary of rule violation for cell "VGND_FF_BALL_2
layout" *********
\o
\o Total errors found: 0


Thanks

 

Except for the rather odd geomConnect rule, this looks like a fairly
normal rule deck. That you are not getting any output from the
extractDevice rules would imply there are no recognition shapes being
formed. Make sure poly actually crosses ndiff and pdiff. I once saw
someone draw the transistors with the diffusion butting the poly, but
not overlapping it. While this is more or less what is actually on the
die, it is not how it is supposed to be drawn.

If nothing else works, try filing a service request with Cadence. With
some data, it will take R&D almost no time at all to figure out what is
happening. They'll need the cds.lib, display.drf, rule file, and
library.

 

What do you mean with: "That you are not getting any output from the
extractDevice rules would imply there are no recognition shapes being
formed."?

Must I have a library model of the transistor? Or must I introduce
other keyword or command? Or some one else?

Thank you

 

Let us use this extractDevice rule from your deck for discussion:

(extractDevice pgate
(poly "G")
(psd "S" "D")
(sub "B")
"pfet ivpcell"
)

What this says is that a "pfet ivpcell" instance will be created for
every shape on the pgate layer which has an interaction with one poly
shape, two psd shapes (with different node numbers since you did not use
the physical option), and a sub shape.

The extractDevice rule will do something for every pgate shape it finds.
Either it will create an instance, or an error. If it creates any
instances, it will tell you how many. If it creates an error, it will
tell you how many. Since it tells you nothing, there must be no pgate
shapes.

In your rules, the pgate layer is generated from the geomAnd of poly and
pdiff. The psd layer is generated from the geomAndNot of pdiff and
pgate, effectively subtracting the poly from the pdiff. If you have no
poly overlapping pdiff, you will get no pgate shapes, so you will get no
devices or errors.

 

Thanks for your explaining.

 

This is the layout of the transistor that I must recognize:

_______________________
| ___________________ |
| | _ | |
| | ___ | | ___ | |
| | | |__|_|__| | | |
| | | D __|_|__ S | | |<-----nplus
| | |___| | | |___| | |
| | |_| ^ |<|------adlvtn
| |_________^_____|___| |
|___________|_____|_____|
| |
| active
poly

Where is the error in the divaEXT.rul file?


-----

(adlvtn = (geomOr "adlvtn"))
(nplus = (geomOr "nplus"))
(active = (geomOr "active"))

(sub_1 = (geomAnd adlvtn nplus))
(sub_SD = (geomAnd sub_1 active))
(sub_SD_2 = (geomAnd sub_SD poly))
(sub_SD_3 = (geomAndNot sub_SD sub_SD_2))
(sub_1_2 = (geomAndNot sub_1 nwell))

---

(extractDevice ngate
(poly "G")
(sub_SD_3 "S" "D")
(sub_1_2 "B")
"nfet ivpcell"
)

 

On the face of things, it should work. You need to send the data in so
it can be run and examined.

 

I have found the error.

I had to use:

(ngate = (geomAnd poly sub_SD_2))

instead

(ngate = (geomAnd poly ndiff)).

Thank you.