DRC error, Label/pin is on a net with a different name?

Discussion in 'Cadence' started by renee, Jun 20, 2008.

  1. renee

    renee Guest

    Dear all,
    I drew the layout myself, and labels are on the pin layer.
    When I run DRC check, it said that "Label/Pin is on a net with a
    different name". But it is strange that the first time I run, it said
    Label/Pin "gnd!" is on a net already named "Y", but the next day, I
    run , then it said "Label/Pin "Y" is on a net already named "gnd!"". I
    did not change the layout between two DRC check. The switch names I
    used are "drc_shape? not_pads?".
    Actually, at first I did not find some logic errors on the
    layout, and then I run extract and LVS. Later I found the error, and
    went back to change the layout and do drc. The Label/Pin errors then
    came up.
    Is it the reason why it said "label/pin is on a net with a
    different name"?

    Thank you very much!

    Renee
     
    renee, Jun 20, 2008
    #1
  2. renee

    AxisIC Guest

    Renee,
    This means that you have a SHORT.
    regards
     
    AxisIC, Jun 20, 2008
    #2
  3. renee

    oliver Guest

    I assume you're running DRC with DIVA.
    "Label/Pin is on a net with a different name" means that you have a
    short-circuit in the layout between the nets with pin Y and
    with pin gnd!

    Oliver.
     
    oliver, Jun 20, 2008
    #3
  4. renee

    renee Guest

    Thank you very much! I already solved the problem.
     
    renee, Jun 21, 2008
    #4
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