creating a Verilog ams model

hello

i was trying to write a Verilog ams model for a resistor (well,
grade-2 students would laugh at me ) and then create a symbol for
it...and use it in another circuit.

i cudn't figure out anything. could someone please suggest the way i
need to go abt doing that.
thanks in advance

regards
mandeep

 

Hi,
If you mean that you wrote the .vams code correctly, but you can't use
it as a real resisitance, that's you cant' see its value for example
to change.. Then, when instantiating your vams symbole, and changing
its parameters (via pressing 'q' bindkey), select "CDF Parameter of
view" to be "Verilog-AMS" or "Verilog-A". Then you will see parameters
that you defined in your original code..

Hope that helps,
Ahmad,

 

I would go the other way around: First create the symbol with pins and
then use create cellview from cellview from the composer menu. Cadence
will then come up with an editor with the interface and include files
correctly. If you want to have parameters, you could go the way
through a schematic where you place pPar("") parameters as values, or
you can just add them in the ams code. You may have to play with the
CDF multilistbox in the object properties dialog to see your
parameters. Disclaimer: I have not done this for ams myself, but I
have done it this way many times in verilog-a. I cannot see why it
shouldn't work for ams.