comparator with hysteresis - veriloga description problem

Hello,

I would like to implement a comparator with hysteresis in veriloga. My
code looks like this:

`include "disciplines.vams"

module comp(out,p,n);
parameter real offset=0.1;
input p,n;
output out;
electrical out,p,n;
real vout,vth,vthaux;

analog begin
@(initial_step) begin
vth=V(n);
if (V(p)>V(n))
begin
vout=1;
vthaux=vth+offset;
end
else
begin
vout=0;
vthaux=vth-offset;
end
end

@(cross(V(p)-vthaux,-1))
begin
vout=0;
vthaux=vth-offset;
end
@(cross(V(p)-vthaux,1))
begin
vout=1;
vthaux=vth+offset;
end
V(out) <+ transition(vout,10p,10p);
end
endmodule

When I simulate it with spectre I get wrong results and additionally,
when the two @cross ... blocks are swapped in position, the results are
different from each other.

Can anybody explain where is the problem and why changing the @cross
sections gives different results?

Thank you in advance.
Rob.

 

Hello Rob,

it seems that the term vthaux=vth+/- offset causes the problem.

You give vthaux=vth-offset after a falling edge, thus lowering the
threshold further.
Then V(p) is again over the threshold (positive edge ?), at least
giving the posibility to detect a second falling edge, now with the
lower threshold.

Therefore have to change the +1/-1 inside cross().

Jan