cdl to verilog

Discussion in 'Cadence' started by Aaron, May 20, 2005.

  1. Aaron

    Aaron Guest

    Guys,
    Anyone know of a quick way to convert cdl netlist to verilog please ?

    Thanks,

    Aaron.
     
    Aaron, May 20, 2005
    #1
  2. Aaron

    Aaron Guest

    Guys,

    Has nobody got any feedback on this possibility for me yet please ?

    Thanks,

    Aaron.
     
    Aaron, May 25, 2005
    #2
  3. Aaron

    David Cuthbert Guest

    Hm... well, CDL is a netlist, while Verilog is a descriptive language.
    I see no reason why it *couldn't* be done, but I'm not so sure it
    *ought* to be done...

    What problem are you trying to solve with this? Have you looked at the
    Design Data Translator's Reference (cds_root/doc/transref/transref.pdf),
    chapter 5? That will tell you how to import a CDL netlist into a
    database; from there, you should be able to use ADE, etc., though I have
    to admit that I'm unfamiliar with CDL.
     
    David Cuthbert, May 25, 2005
    #3
  4. Aaron

    tritue Guest

    The problem with verilog import is parameter.
    let say we have a transistor w=3u l=0.5u. How can we write a verilog
    description to import this transitor + parameter into a schematic? Any idea
    ?

    It will be much simpler usinf cdlIn with ic5.141

    TTT
     
    tritue, May 27, 2005
    #4
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