[Apologies if you receive multiple copies of this announcement.] CALL FOR PAPERS -- ASYNC 2005 The Eleventh IEEE* International Symposium on Asynchronous Circuits and Systems March 14-16, 2005, New York City, NY, USA Venue: Columbia University The International Symposium on Asynchronous Circuits and Systems provides a high quality forum for scientists and engineers to present their latest research findings. Authors are invited to submit full papers on all aspects of asynchronous design. Topics of interest include, but are not limited to: * Mixed synchronous/asynchronous architectures, interfaces, and circuits * High-speed/low-power asynchronous logic, memories, and interconnects * High-level design and synthesis of self-timed circuits * Physical design of unclocked logic and pipelines * Formal methods for correctness and performance analysis of asynchronous designs * Test, reliability, security, and radiation tolerance * CAD for asynchronous design and validation * Asynchronous System-on-a-chip (SoC) * Novel asynchronous architectures * Asynchrony and latency tolerance in system-level design Papers should be submitted via the conference web site. The submission should not exceed ten pages in IEEE double column format. Papers that exceed the length limit may not be reviewed. Papers will be evaluated by the program committee and reviews will be based on scientific merit, innovation, relevance, and presentation. New-idea papers are encouraged, and the program committee recognizes that such papers may contain less evaluation than papers in established areas. Accepted papers will be published in a proceedings that will be distributed at the conference. WEBSITE: http://vlsi.cornell.edu/async2005/ SUBMISSION INFORMATION Submission deadline: 27 Sep 2004 Notification of acceptance: 29 Nov 2004 Final version due: 03 Jan 2005 Paper Format: Abstract of up to 150 words, 10 pages or fewer, including figures, Single spaced, 10pt or larger font size, IEEE double column conference format. SYMPOSIUM COMMITTEE: General Co-Chairs: Steven Nowick (nowick AT cs.columbia.edu) Jose Tierno (tierno AT us.ibm.com) Program Co-Chairs: Prabhakar Kudva (kudva AT us.ibm.com) Rajit Manohar (rajit AT csl.cornell.edu) Publications: Erik Brunvand Invited Speakers/Tutorials: Prabhakar Kudva Best Paper Award: H. Peter Hofstee Local Arrangements/Publicity: Montek Singh Industrial Liason: Ken Stevens Finance Chair: Jose Tierno PROGRAM COMMITTEE: John Bainbridge (UK) Mike Kishinevsky (USA) Peter Beerel (USA) Alex Kondratyev (USA) Erik Brunvand (USA) Luciano Lavagno (Italy) Supratik Chakraborty (India) Michael Liebelt (Australia) Bill Coates (USA) Andrew Lines (USA) Peter Cook (USA) Diana Marculescu (USA) Jordi Cortadella (Spain) Alain Martin (USA) Al Davis (USA) Takashi Nanya (Japan) Charles Dike (USA) Radu Negulescu (Canada) Jo Ebergen (USA) Ad Peeters (Netherlands) Doug Edwards (UK) Marc Renaudin (France) Karl Fant (USA) Marly Roncken (USA) Ran Ginosar (Israel) Montek Singh (USA) Eckard Grass (Germany) Christos Sotiriou (Greece) Mark Greenstreet (Canada) Jens Sparso (Denmark) Christoph Heer (Germany) Alexander Taubin (USA) Hans Jacobson (USA) Stephen Unger (USA) Mark Josephs (UK) Alex Yakovlev (UK) Joep Kessels (Netherlands) Tomohiro Yoneda (Japan) David Kinniment (UK) *IEEE sponsorship pending
