Hi All, I tried to perform a parasitic simulation on a layout whose some ports are labeled as IN<0>, IN<1> ..., but as rcxToDfii converts the bus signals to IN(0), IN(1)... the spectre netlister complains as following: \o Netlist Warning: Terminal IN<0> does not exist in \o cell-view "test" "test_top" "av_extracted" \o Netlist Warning: Mismatch was found between the terminals in the cellView and \o those on the pin order property on the schematic, or on the termOrder \o property on the CDF. The internal default order is being used. Please \o eliminate the mismatch if any of the above properties must be used for \o netlisting. \o ERROR: Netlister : member terminal 'IN<0>' of instance 'asic' in cell 'top_sim' view 'schematic' : cannot be found in the switche d master of the instance. Do I have to change the bus delimiters in schematic/layout from <> to () ? Thanks for help!