AWGN in Cadence?

Discussion in 'Cadence' started by Jason D. Bakos, Nov 25, 2003.

  1. Hello!

    Anyone have a way to add additive white Gaussian noise to nodes in a
    Virtuoso schematic and can be simulated in Affirma/Spectre/Analog Artist?

    Thanks,
    -Jason
     
    Jason D. Bakos, Nov 25, 2003
    #1
  2. Jason D. Bakos

    Partha Guest

    Jason,
    There are multiple ways of doing this,
    If the simulator is spectre

    1. Using verilog-A noise functions
    2. Adding a white noise current source
    3. Adding a white noise voltage source

    I beleive i saw the above sometime before @ source link, i am not able
    to recollect it now, seach sourcelink for details

    If you use spectre-Rf as your simulator, you could do a PNoise nalysis
    by adding sources of noise on the nodes(port components?)
     
    Partha, Nov 26, 2003
    #2
  3. Partha,

    Thanks for your reply. I'm not too familiar with Verilog, but I managed to
    modify the Cadence Verilog-A noise_src module to make the random number
    generator gaussian. However, this requires me to add a noise source in
    series with all the nodes to which I want to add noise. Is there a better
    way to do this? For example, is there an operator other than "<+" in
    Verilog that will simply provide an additive voltage source to an existing
    node?

    In addition, does the following Verilog-A module accurately (realistically)
    model AWGN if put in series with an existing node?

    `include "discipline.h"
    `include "constants.h"

    module noise_src(vout,ref);
    output vout;
    input ref;
    electrical vout,ref;
    parameter real amp = 0.2 from [0:inf);
    parameter real att = 10 from [0:inf);
    integer seed;

    analog begin
    @ (initial_step) begin
    seed=23;
    end

    V(vout,ref) <+ amp * $dist_normal(seed,0,1)/att;
    $display ("seed is %d",seed);
    end

    endmodule

    Thanks,
    -Jason
     
    Jason D. Bakos, Nov 26, 2003
    #3
  4. Jason D. Bakos

    fogh Guest

    Jason,

    I am also not so familiar with verilog-A , but I believe there is a
    ready-made function white_noise

    The way I would do it is with a resistor and a VCVS, because I find it
    more readable to have everything in the schematic rather than in
    verilog-A code, when practical.

     
    fogh, Dec 3, 2003
    #4
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