Any tips on debugging SpectreHDL schematics

Discussion in 'Cadence' started by Zhiheng Cao, Nov 21, 2005.

  1. Zhiheng Cao

    Zhiheng Cao Guest

    Hi,

    I have a simulink model for a delta-sigma modulator
    and it is working fine. I am trying to transform this
    to a switch level schmatics with all ideal components
    (written in SpectreHDL), but I cannot get the loop stable.
    I tried breaking the loop somewhere and applying a
    step input and comparing the response with Simulink
    model, and the response looks very similar. But as soon
    as I close the loop the waveforms are totally different.

    Does anyone have similar experience and could you please
    share your experience and how you solved this problem,
    what could be wrong, what is the effective approach to
    debug the problem, anything, since I am stuck here for
    several days. thank you very much.
     
    Zhiheng Cao, Nov 21, 2005
    #1
  2. If you are working in Analog Design Environment, you could use the
    debugger. It is available from the Simulation menu. At the bottom you
    have "netlist and debug AHDL".

    In ahdlLib there is a component called "sigmadelta_1storder" you could
    look at to check how cadence implements their modulator.
     
    Svenn Are Bjerkem, Nov 22, 2005
    #2
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