Analog (RF) Layout Checklist

Discussion in 'Cadence' started by vdvalk, Jul 25, 2006.

  1. vdvalk

    vdvalk Guest

    Does anyone have an Analog (RF) layout checklist?

    I have been asked to provide a macro cell checklist for an RF project
    that I am on.

    I can think of a few dozen things that I want. Any others?

    * Cell boundary drawn on prBoundary
    * pin name all in UPPER case
    * cell boundary rectilinear (prefer rectangular) with no data outside
    macro
    * Cell passes DRC, LVS, FILL, ERC checks stan alone.
    * Cell has physical pins for all global nets.
    * All I/O's document the critical nature ( noise, I/R drop, matching,
    quiet, etc.) or assumed to be noisy digital lines with no speical
    routing requirements. All bidirectional and supply nets must specify
    minimum I/R drop.
    * I/O's conform to a particular grid requirement ( to ease the use of
    autorouting )
    * grounding and shielding requirements of macro

    -- any other obvious ones?

    -- Gerry
     
    vdvalk, Jul 25, 2006
    #1
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