Cadence

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  1. soumik

    Power Analysis in spectre

    soumik, Feb 5, 2004
    Replies:
    1
    Views:
    1,039
    Andrew Beckett
    Feb 10, 2004
  2. kenny

    assura assertion crash

    kenny, Feb 9, 2004
    Replies:
    1
    Views:
    921
    Andrew Beckett
    Feb 9, 2004
  3. boki

    How to convert VHDL/ verilog code to layout?

    boki, Feb 2, 2004
    Replies:
    6
    Views:
    1,172
    boki
    Feb 9, 2004
  4. Suvodeep

    global routing

    Suvodeep, Feb 9, 2004
    Replies:
    0
    Views:
    768
    Suvodeep
    Feb 9, 2004
  5. vidhya

    Cadence Virtuoso Editor

    vidhya, Feb 3, 2004
    Replies:
    3
    Views:
    1,029
    Hristo Brachkov
    Feb 8, 2004
  6. Justin

    Using Sun Grid Engine for Cadence applications

    Justin, Jan 2, 2004
    Replies:
    7
    Views:
    1,062
    Ulrich Seeling
    Feb 7, 2004
  7. kris

    sdf generation from dpsf

    kris, Jan 27, 2004
    Replies:
    2
    Views:
    764
    Ed Martinage
    Feb 7, 2004
  8. Poly Diffusion

    SKILL code to pare down a library to its essentials

    Poly Diffusion, Feb 6, 2004
    Replies:
    1
    Views:
    790
    Tim Roy
    Feb 6, 2004
  9. Erik Wanta

    noise integration memory leak?

    Erik Wanta, Feb 3, 2004
    Replies:
    6
    Views:
    901
    Erik Wanta
    Feb 5, 2004
  10. Udupa

    Broken pipe error while using CADENCE

    Udupa, Feb 5, 2004
    Replies:
    1
    Views:
    929
    Erik Wanta
    Feb 5, 2004
  11. Xiaofeng Wang

    question on cadence

    Xiaofeng Wang, Feb 4, 2004
    Replies:
    1
    Views:
    800
    Andrew Beckett
    Feb 4, 2004
  12. smartchi

    Transistor in same ratio (100/2 & 50/1), what is the different?

    smartchi, Feb 3, 2004
    Replies:
    2
    Views:
    994
    Xiaofeng Wang
    Feb 4, 2004
  13. Erik Wanta

    spectre captab?

    Erik Wanta, Feb 1, 2004
    Replies:
    3
    Views:
    6,546
    Erik Wanta
    Feb 3, 2004
  14. kris

    sdf generation primetime

    kris, Jan 31, 2004
    Replies:
    2
    Views:
    1,167
    Mike Sendrove
    Feb 2, 2004
  15. Bradip Pitt

    PLEASE HELP: need to export geometric tolerances of a surface

    Bradip Pitt, Feb 2, 2004
    Replies:
    2
    Views:
    1,001
    Bradip Pitt
    Feb 2, 2004
  16. rajan

    Comparison of the Co-verification tools for SoC/ASIC

    rajan, Feb 2, 2004
    Replies:
    0
    Views:
    917
    rajan
    Feb 2, 2004
  17. Nianwei XING

    RF circuit Layout techniques

    Nianwei XING, Jan 26, 2004
    Replies:
    3
    Views:
    911
    fogh
    Feb 2, 2004
  18. Raf

    Moving to a new, unsupported process

    Raf, Feb 1, 2004
    Replies:
    1
    Views:
    757
    S. Badel
    Feb 2, 2004
  19. Bradip Pitt

    Please HELP: need routine to export coordinates of UCS to text file

    Bradip Pitt, Feb 2, 2004
    Replies:
    0
    Views:
    934
    Bradip Pitt
    Feb 2, 2004
  20. kris

    LVS: pin layer (Silicon Ensemble 2 Virtuoso)

    kris, Jan 30, 2004
    Replies:
    1
    Views:
    938
    S. Badel
    Jan 30, 2004
  21. Ms Mayu Karita

    synchronization of two 4D CAD models

    Ms Mayu Karita, Jan 30, 2004
    Replies:
    0
    Views:
    833
    Ms Mayu Karita
    Jan 30, 2004
  22. Ken

    A Big Orcad Project

    Ken, Jan 29, 2004
    Replies:
    0
    Views:
    665
    Ken
    Jan 29, 2004
  23. Wei Huang

    Temeprature info in layout

    Wei Huang, Jan 28, 2004
    Replies:
    0
    Views:
    601
    Wei Huang
    Jan 28, 2004
  24. Erik Wanta

    asiDefineDataAccessFunction??

    Erik Wanta, Jan 27, 2004
    Replies:
    1
    Views:
    692
    Erik Wanta
    Jan 27, 2004
  25. Nathan

    Cadence Spectre and Virtuso on RedHat Linux 9.0

    Nathan, Jan 26, 2004
    Replies:
    3
    Views:
    1,096
    B
    Jan 27, 2004
  26. TELEPAC

    ERROR -- Convergence problem in transient analysis

    TELEPAC, Jan 8, 2004
    Replies:
    1
    Views:
    1,887
    Jimmy Blue
    Jan 27, 2004
  27. Jimmy Blue

    Zero Diagonal found in Jacobian

    Jimmy Blue, Jan 27, 2004
    Replies:
    0
    Views:
    3,480
    Jimmy Blue
    Jan 27, 2004
  28. fogh

    lineread() arguments

    fogh, Jan 22, 2004
    Replies:
    2
    Views:
    786
    fogh
    Jan 26, 2004
  29. Mike Russell

    PSD13.x migration to PSD15.1 allegro

    Mike Russell, Jan 22, 2004
    Replies:
    1
    Views:
    970
    Administrator
    Jan 24, 2004
  30. Manfred Kraus

    Thread has died in Capture 10.1

    Manfred Kraus, Jan 23, 2004
    Replies:
    0
    Views:
    719
    Manfred Kraus
    Jan 23, 2004
  31. ss_dighe

    Writing out a def file with different units

    ss_dighe, Jan 22, 2004
    Replies:
    1
    Views:
    874
    Ronald
    Jan 23, 2004
  32. Mike Russell

    PSD14.2 concept, PSD15.1 allegro

    Mike Russell, Jan 16, 2004
    Replies:
    3
    Views:
    998
    daytripper
    Jan 22, 2004
  33. Tim Roy

    Spectre speed: Solaris/Sparc vs Linux PC

    Tim Roy, Jan 16, 2004
    Replies:
    7
    Views:
    1,227
    Harald Neubauer
    Jan 22, 2004
  34. tns1

    Schematic page corruption/incompatibilities?

    tns1, Jan 13, 2004
    Replies:
    1
    Views:
    681
    tns
    Jan 22, 2004
  35. Sam Tran

    Interface Element problems

    Sam Tran, Jan 16, 2004
    Replies:
    2
    Views:
    1,040
    Andrew Beckett
    Jan 21, 2004
  36. bigbag

    Where I can get or buy BSIM3v3 model file in Verilog-a or Verilog-ams?

    bigbag, Jan 15, 2004
    Replies:
    1
    Views:
    1,062
    F ogh
    Jan 21, 2004
  37. Nathan

    Cadence Spectre and Virtuso on RedHat Linux 9.0

    Nathan, Jan 16, 2004
    Replies:
    9
    Views:
    1,307
    Jay Lessert
    Jan 21, 2004
  38. Bernd Fischer

    SKILL Q: enable form field dynamically

    Bernd Fischer, Jan 20, 2004
    Replies:
    5
    Views:
    907
    Bernd Fischer
    Jan 21, 2004
  39. Andreas Dreyfert

    How to get dc operating point data from a swept dc analysis or aparametric dc analysis in ocean

    Andreas Dreyfert, Jan 16, 2004
    Replies:
    2
    Views:
    1,172
    Andreas Dreyfert
    Jan 21, 2004
  40. Bernd Fischer

    SKILL Q: enterPath termination?

    Bernd Fischer, Jan 15, 2004
    Replies:
    1
    Views:
    908
    Andrew Beckett
    Jan 20, 2004
  41. Sa

    Skill ++ and DataStructures

    Sa, Jan 20, 2004
    Replies:
    3
    Views:
    1,167
    Andrew Beckett
    Jan 20, 2004
  42. Fritz Lange

    Log files in clsJobMonitor

    Fritz Lange, Jan 20, 2004
    Replies:
    0
    Views:
    680
    Fritz Lange
    Jan 20, 2004
  43. Tobias Leisgang

    keyboard shortcuts simvision

    Tobias Leisgang, Jan 20, 2004
    Replies:
    0
    Views:
    2,234
    Tobias Leisgang
    Jan 20, 2004
  44. JNJ Eaton, Sr.

    Large Format Plotter Selection Help

    JNJ Eaton, Sr., Jan 16, 2004
    Replies:
    5
    Views:
    889
    Joanne Weston
    Jan 20, 2004
  45. JNJ Eaton, Sr.

    Me again..... Looking fo Laptop Suggestions

    JNJ Eaton, Sr., Jan 17, 2004
    Replies:
    7
    Views:
    1,264
    Jose Bonifacio
    Jan 20, 2004
  46. rubin

    Spectre HDL $fread() question

    rubin, Jan 13, 2004
    Replies:
    7
    Views:
    952
    Andrew Beckett
    Jan 19, 2004
  47. Boki

    VHDL / auto-layout / decimation filter

    Boki, Jan 19, 2004
    Replies:
    0
    Views:
    765
    Boki
    Jan 19, 2004
  48. Pedro Alves

    Hspice capacitance measurement

    Pedro Alves, Jan 19, 2004
    Replies:
    0
    Views:
    785
    Pedro Alves
    Jan 19, 2004
  49. bigbag

    Where I can get or buy BSIM3v3 model file in Verilog-a or Verilog-ams?

    bigbag, Jan 15, 2004
    Replies:
    2
    Views:
    1,039
    Erik Wanta
    Jan 19, 2004
  50. ryan thomas

    tutorial on cadence/synopsys

    ryan thomas, Jan 19, 2004
    Replies:
    0
    Views:
    801
    ryan thomas
    Jan 19, 2004
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