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DRC for large chips
Kuan Zhou
,
Jul 8, 2004
Replies:
7
Views:
930
Raf
Jul 10, 2004
Top Verilog & VHDL reference books at over 50% off
HDL Book Seller
,
Jul 6, 2004
Replies:
2
Views:
840
Jason Zheng
Jul 9, 2004
gds2 problem
Kuan Zhou
,
Jul 8, 2004
Replies:
1
Views:
724
Richard Griffith
Jul 8, 2004
A dangerous characteristic of Cadence layout editor
Tao Chen
,
Jul 5, 2004
Replies:
3
Views:
689
Tao Chen
Jul 8, 2004
view simulation Log files in JobMonitor (Distributed Processing)
Circa Compostella
,
Jul 8, 2004
Replies:
0
Views:
747
Circa Compostella
Jul 8, 2004
Synthesis?
Jason D. Bakos
,
Jun 30, 2004
Replies:
2
Views:
966
Erik Wanta
Jul 7, 2004
pass the value of a parameter from "init.s"(cdsSpice) to hspiceS
Xuejun Zhang
,
Jun 24, 2004
Replies:
1
Views:
879
Andrew Beckett
Jul 6, 2004
How to insert menu item for wavescan in Analog Design Environment?
svenn.are
,
Jul 5, 2004
Replies:
1
Views:
998
Andrew Beckett
Jul 6, 2004
assura XOR from GUI
Erik Wanta
,
Jun 22, 2004
Replies:
4
Views:
1,102
Erik Wanta
Jul 5, 2004
Any method to draw a 45 degree path?
Tao Chen
,
Jul 2, 2004
Replies:
1
Views:
1,062
Jim Newton
Jul 2, 2004
Error in Pnoise Analysis
Abhishek
,
Jul 2, 2004
Replies:
0
Views:
759
Abhishek
Jul 2, 2004
Merge parallel transistors on extract
Raf Karakiewicz
,
Jun 23, 2004
Replies:
2
Views:
951
Andrew Beckett
Jul 2, 2004
Questions about cadence tools
Martin Lefebvre
,
Jul 1, 2004
Replies:
3
Views:
939
mx
Jul 2, 2004
Colored EPS plot with correct Bounding Box
Carl Cursujani
,
Jun 28, 2004
Replies:
2
Views:
884
???
Jul 1, 2004
DSN conversion utility
lounger
,
Jun 29, 2004
Replies:
2
Views:
793
lounger
Jun 30, 2004
Deleting schematic using Skill
dati_remo
,
Jun 28, 2004
Replies:
2
Views:
612
[email protected]
Jun 30, 2004
running lmgrd
meshgr
,
Jun 25, 2004
Replies:
3
Views:
853
Andrew Beckett
Jun 28, 2004
Multiple montecarlo analysis with different seed value
vikas
,
Jun 27, 2004
Replies:
0
Views:
862
vikas
Jun 27, 2004
Is Cadence LDV 5.1 and IC 5033 run on REDHAT 8?
Juvezio
,
May 26, 2004
Replies:
4
Views:
832
Ulrich
Jun 25, 2004
Distributed Synthesis question
Matko Bosnjak
,
Jun 12, 2004
Replies:
1
Views:
912
Jean Brouwers
Jun 25, 2004
Distributed Synthesis
mama tvoja
,
Jun 22, 2004
Replies:
1
Views:
912
Jean Brouwers
Jun 25, 2004
Model File Missing
meshgr
,
Jun 25, 2004
Replies:
2
Views:
549
Cliff Curry
Jun 25, 2004
Attach Technologi file
Allan Nielsen
,
Jun 25, 2004
Replies:
1
Views:
548
S. Badel
Jun 25, 2004
Free synthesis tools
Daniel Kroening
,
Jun 24, 2004
Replies:
0
Views:
735
Daniel Kroening
Jun 24, 2004
Save every run's psf data in MonteCarlo analysis
Xuejun Zhang
,
Jun 18, 2004
Replies:
2
Views:
947
Xuejun Zhang
Jun 24, 2004
GDSII problems with arrays/mosaics from CATS
Dustin D.
,
Jun 20, 2004
Replies:
2
Views:
1,046
Dustin D.
Jun 23, 2004
Global parametrers with PCells and TopCells (SKILL)
Benjamin Wolman
,
Jun 9, 2004
Replies:
4
Views:
876
fogh
Jun 23, 2004
How to use .data command in hspiceS interface
Xuejun Zhang
,
Jun 22, 2004
Replies:
0
Views:
1,004
Xuejun Zhang
Jun 22, 2004
connecting a wide wire net to gnd!/vdd!
Serkan
,
Jun 21, 2004
Replies:
3
Views:
1,082
Serkan
Jun 22, 2004
Montecarlo Simulation (mismatch variation)
vikas
,
Jun 18, 2004
Replies:
2
Views:
916
Andrew Beckett
Jun 21, 2004
z domain simulation in spectre
ebers-moll
,
Jun 21, 2004
Replies:
0
Views:
1,114
ebers-moll
Jun 21, 2004
How to setup SKILL code about sevStartSession() to open a new ADE(artist) ?
roland
,
Jun 21, 2004
Replies:
0
Views:
996
roland
Jun 21, 2004
Problem with ipcReadProcess.
Hon Seng Phuah
,
Jun 21, 2004
Replies:
0
Views:
553
Hon Seng Phuah
Jun 21, 2004
PKS 5.0/Ambit (Verilog) global define?
hmmmm
,
Jun 20, 2004
Replies:
0
Views:
686
hmmmm
Jun 20, 2004
extraction deck for inductors
aditya
,
Jun 20, 2004
Replies:
0
Views:
712
aditya
Jun 20, 2004
mosis pads in cadence
aditya
,
Jun 19, 2004
Replies:
0
Views:
834
aditya
Jun 19, 2004
schematic from parasitic extraction
Alex Gerdemann
,
Jun 17, 2004
Replies:
2
Views:
943
G Vandevalk
Jun 18, 2004
Cannot read all output result by using ipcReadProcess command.
Hon Seng Phuah
,
Jun 18, 2004
Replies:
1
Views:
1,012
S. Badel
Jun 18, 2004
fft (dft) in spectre
aditya
,
Jun 18, 2004
Replies:
1
Views:
2,131
smartchi
Jun 18, 2004
umask is 0022 by default in 5.0.32??
Manju Arasaiah
,
Jun 17, 2004
Replies:
0
Views:
556
Manju Arasaiah
Jun 17, 2004
linked cds.lib issue!
Manju Arasaiah
,
Jun 16, 2004
Replies:
5
Views:
990
Manju Arasaiah
Jun 17, 2004
How to get filename based on file pointer
Junmou Zhang
,
Jun 16, 2004
Replies:
1
Views:
781
Andrew Beckett
Jun 16, 2004
SKILL Quick Reference (OpenAccess & CDBA) at DAC 2004
John Gianni
,
May 28, 2004
Replies:
1
Views:
932
John Gianni
Jun 16, 2004
NULL handle supplied to routine acc_fetch_size()
Erik Wanta
,
Jun 16, 2004
Replies:
0
Views:
693
Erik Wanta
Jun 16, 2004
help with NCSU DESIGN KIT
aditya
,
Jun 15, 2004
Replies:
0
Views:
666
aditya
Jun 15, 2004
Layout Magnification
Andrey Orlenko 395924625
,
Jun 3, 2004
Replies:
4
Views:
783
John Gianni
Jun 15, 2004
Accurate noise modeling?
Jason D. Bakos
,
Jun 15, 2004
Replies:
0
Views:
689
Jason D. Bakos
Jun 15, 2004
Identfying area to place doubled contact
Chandramohan Neelakantan
,
Jun 15, 2004
Replies:
0
Views:
813
Chandramohan Neelakantan
Jun 15, 2004
Import a cell designed using other technology
Juan Felipe Osorio
,
Jun 3, 2004
Replies:
2
Views:
798
Andrew Beckett
Jun 15, 2004
verilog to schematic problem.
ARAVIND
,
Jun 15, 2004
Replies:
1
Views:
1,171
Bernd Fischer
Jun 15, 2004
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