Cadence

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  1. danmc

    skill to dump functional view

    danmc, Apr 14, 2006
    Replies:
    2
    Views:
    745
    danmc
    Apr 18, 2006
  2. danmc

    verilog-XL global force or reset

    danmc, Apr 18, 2006
    Replies:
    0
    Views:
    809
    danmc
    Apr 18, 2006
  3. Belal

    Wavescan: plotting an expression vs. another expression

    Belal, Apr 18, 2006
    Replies:
    1
    Views:
    967
    S. Badel
    Apr 18, 2006
  4. ponderboy

    error when Decrypting rfkit

    ponderboy, Apr 16, 2006
    Replies:
    0
    Views:
    537
    ponderboy
    Apr 16, 2006
  5. SS

    changing points in enterPath after every point

    SS, Apr 6, 2006
    Replies:
    2
    Views:
    764
    SS
    Apr 15, 2006
  6. Allen

    How can I place a guard ring on my chip

    Allen, Apr 14, 2006
    Replies:
    0
    Views:
    1,019
    Allen
    Apr 14, 2006
  7. horridnoodle

    AMIS C5 process

    horridnoodle, Apr 12, 2006
    Replies:
    1
    Views:
    695
    [email protected]
    Apr 14, 2006
  8. hillbrk

    Capacitor Issue

    hillbrk, Apr 7, 2006
    Replies:
    3
    Views:
    465
    fogh
    Apr 13, 2006
  9. TimRoy1

    Paths ending with 90 Degree bend less than 1/2 width long problem

    TimRoy1, Mar 28, 2006
    Replies:
    5
    Views:
    968
    Kholdoun TORKI
    Apr 13, 2006
  10. decertan

    Size of new instances in Schematic Composer

    decertan, Apr 13, 2006
    Replies:
    1
    Views:
    782
    fogh
    Apr 13, 2006
  11. linkin

    parametric analysis error

    linkin, Apr 7, 2006
    Replies:
    2
    Views:
    656
    linkin
    Apr 12, 2006
  12. horridnoodle

    Mosis padframes

    horridnoodle, Apr 12, 2006
    Replies:
    0
    Views:
    597
    [email protected]
    Apr 12, 2006
  13. Shankar

    Loading pcell failing

    Shankar, Apr 12, 2006
    Replies:
    1
    Views:
    813
    Andrew Beckett
    Apr 12, 2006
  14. jools

    DFII keyboard shortcuts

    jools, Apr 11, 2006
    Replies:
    1
    Views:
    938
    Andrew Beckett
    Apr 12, 2006
  15. Vissu

    Schematic top net name

    Vissu, Apr 10, 2006
    Replies:
    1
    Views:
    656
    Andrew Beckett
    Apr 12, 2006
  16. Tech11

    Diffusion layer connecting is prohibited, how should I write rules?

    Tech11, Apr 5, 2006
    Replies:
    1
    Views:
    846
    Andrew Beckett
    Apr 12, 2006
  17. zhanyuanjiang

    oceanEval statement in monte carlo simulation in spectre

    zhanyuanjiang, Apr 5, 2006
    Replies:
    1
    Views:
    1,117
    Andrew Beckett
    Apr 12, 2006
  18. Tech11

    May I run spectre simulation with hspice model?

    Tech11, Apr 5, 2006
    Replies:
    3
    Views:
    978
    Andrew Beckett
    Apr 11, 2006
  19. Svenn Are Bjerkem

    Is XML still rated useful for EDA?

    Svenn Are Bjerkem, Apr 5, 2006
    Replies:
    3
    Views:
    780
    Andrew Beckett
    Apr 11, 2006
  20. PKG

    ncvlog was not found?

    PKG, Apr 8, 2006
    Replies:
    1
    Views:
    722
    Andrew Beckett
    Apr 11, 2006
  21. Thomas Ussmueller

    Purpose of Layers in IBM PDK

    Thomas Ussmueller, Apr 11, 2006
    Replies:
    0
    Views:
    770
    Thomas Ussmueller
    Apr 11, 2006
  22. JC

    Help! Bus notation on schematics

    JC, Oct 28, 2005
    Replies:
    7
    Views:
    5,174
    Alexey Lopich
    Apr 8, 2006
  23. omar.fmd

    Routing problem in Cadence

    omar.fmd, Apr 8, 2006
    Replies:
    0
    Views:
    572
    [email protected]
    Apr 8, 2006
  24. Edward Dodge

    Virtuoso: Over-riding Techfile's VIA Justification?

    Edward Dodge, Apr 8, 2006
    Replies:
    0
    Views:
    902
    Edward Dodge
    Apr 8, 2006
  25. jutek

    hspice .measure

    jutek, Apr 7, 2006
    Replies:
    0
    Views:
    488
    jutek
    Apr 7, 2006
  26. hamidrezah

    Logic Depth Dependent Synthesis

    hamidrezah, Apr 3, 2006
    Replies:
    1
    Views:
    751
    David Wallace
    Apr 6, 2006
  27. SS

    instantiate form with default values

    SS, Apr 5, 2006
    Replies:
    3
    Views:
    617
    SS
    Apr 6, 2006
  28. payazal

    help me, drc problem in cadence

    payazal, Apr 6, 2006
    Replies:
    0
    Views:
    681
    payazal
    Apr 6, 2006
  29. ponderboy

    assura lvs erroe informatiom code

    ponderboy, Apr 5, 2006
    Replies:
    4
    Views:
    620
    ponderboy
    Apr 6, 2006
  30. ponderboy

    which tools include LibGen?

    ponderboy, Apr 5, 2006
    Replies:
    2
    Views:
    819
    ponderboy
    Apr 6, 2006
  31. Tech11

    Is there any difference between virtuoso and virtuoso XL?

    Tech11, Apr 5, 2006
    Replies:
    2
    Views:
    1,805
    John Gianni
    Apr 6, 2006
  32. stroller

    version control using subversion

    stroller, Mar 27, 2006
    Replies:
    8
    Views:
    796
    Svenn Are Bjerkem
    Apr 5, 2006
  33. tstengerster

    Cadence and RHEL 4.0

    tstengerster, Apr 4, 2006
    Replies:
    3
    Views:
    610
    [email protected]
    Apr 5, 2006
  34. tritue

    set processPriority with distribute processing

    tritue, Apr 5, 2006
    Replies:
    0
    Views:
    614
    tritue
    Apr 5, 2006
  35. ponderboy

    HSPICE interface with cadence artist

    ponderboy, Apr 4, 2006
    Replies:
    0
    Views:
    644
    ponderboy
    Apr 4, 2006
  36. b108463

    How to use NCVHDL to dump fsdb file?

    b108463, Apr 4, 2006
    Replies:
    0
    Views:
    1,114
    [email protected]
    Apr 4, 2006
  37. ponderboy

    which feature do i need to run MSPS?

    ponderboy, Apr 3, 2006
    Replies:
    4
    Views:
    662
    Andrew Beckett
    Apr 4, 2006
  38. Sam

    using analog artist to simulate a certian MC run?

    Sam, Mar 31, 2006
    Replies:
    2
    Views:
    676
    Sam
    Apr 4, 2006
  39. tstengerster

    How to toggle how an item is mirrored in virtuoso layout

    tstengerster, Mar 25, 2006
    Replies:
    2
    Views:
    863
    [email protected]
    Apr 3, 2006
  40. Bernd Fischer

    how to customize open configuration form?

    Bernd Fischer, Mar 29, 2006
    Replies:
    3
    Views:
    878
    Andrew Beckett
    Apr 2, 2006
  41. samanta.susovon

    how to run a full spice netlist not the subcircuit in the spectre

    samanta.susovon, Mar 25, 2006
    Replies:
    2
    Views:
    950
    fogh
    Mar 31, 2006
  42. Roland.Fontaine

    Analog Layout Training

    Roland.Fontaine, Mar 31, 2006
    Replies:
    2
    Views:
    888
    DReynolds
    Mar 31, 2006
  43. mohanr

    Calling a function inside a Viewfile Window ?

    mohanr, Mar 29, 2006
    Replies:
    1
    Views:
    904
    Andrew Beckett
    Mar 31, 2006
  44. Edward Dodge

    VXL: Setting Contact xBias/yBias

    Edward Dodge, Mar 30, 2006
    Replies:
    1
    Views:
    897
    Bernd Fischer
    Mar 31, 2006
  45. desai.vandana

    disk space for spectreS simulations

    desai.vandana, Mar 30, 2006
    Replies:
    3
    Views:
    925
    Andrew Beckett
    Mar 31, 2006
  46. decertan

    Buggy behaviour with Analog DE / Spectre and newline in input.scs

    decertan, Mar 28, 2006
    Replies:
    2
    Views:
    734
    Andrew Beckett
    Mar 31, 2006
  47. Rajeswaran M

    getting the list of cellviews in hierarchy

    Rajeswaran M, Mar 28, 2006
    Replies:
    1
    Views:
    716
    Andrew Beckett
    Mar 31, 2006
  48. camelot

    dump pcell code

    camelot, Mar 27, 2006
    Replies:
    4
    Views:
    966
    Andrew Beckett
    Mar 31, 2006
  49. ponderboy

    how to setup interface between cadence design frame work and hspice

    ponderboy, Mar 27, 2006
    Replies:
    1
    Views:
    977
    Andrew Beckett
    Mar 31, 2006
  50. cyseok

    override predefined model parameter?

    cyseok, Mar 21, 2006
    Replies:
    2
    Views:
    1,091
    Andrew Beckett
    Mar 31, 2006
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